Searched refs:RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos (Results 1 – 4 of 4) sorted by relevance
8762 #define RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos (0UL) /*!<RADIO_CTRL … macro8765 …OD_REG_SLOW_PERIOD_0 (0x1U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8766 …OD_REG_SLOW_PERIOD_1 (0x2U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8767 …OD_REG_SLOW_PERIOD_2 (0x4U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8768 …OD_REG_SLOW_PERIOD_3 (0x8U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8769 …D_REG_SLOW_PERIOD_4 (0x10U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8770 …D_REG_SLOW_PERIOD_5 (0x20U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8771 …D_REG_SLOW_PERIOD_6 (0x40U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8772 …D_REG_SLOW_PERIOD_7 (0x80U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)8773 …_REG_SLOW_PERIOD_8 (0x100U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)[all …]
9290 #define RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos (0UL) /*!< RADIO_CTRL … macro9293 …REG_SLOW_PERIOD_0 (0x0001 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9294 …REG_SLOW_PERIOD_1 (0x0002 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9295 …REG_SLOW_PERIOD_2 (0x0004 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9296 …REG_SLOW_PERIOD_3 (0x0008 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9297 …REG_SLOW_PERIOD_4 (0x0010 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9298 …REG_SLOW_PERIOD_5 (0x0020 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9299 …REG_SLOW_PERIOD_6 (0x0040 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9300 …REG_SLOW_PERIOD_7 (0x0080 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…9301 …REG_SLOW_PERIOD_8 (0x0100 << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)…[all …]
9159 #define RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos (0UL) /*!<RADIO_CTRL … macro9162 …OD_REG_SLOW_PERIOD_0 (0x1U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9163 …OD_REG_SLOW_PERIOD_1 (0x2U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9164 …OD_REG_SLOW_PERIOD_2 (0x4U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9165 …OD_REG_SLOW_PERIOD_3 (0x8U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9166 …D_REG_SLOW_PERIOD_4 (0x10U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9167 …D_REG_SLOW_PERIOD_5 (0x20U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9168 …D_REG_SLOW_PERIOD_6 (0x40U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9169 …D_REG_SLOW_PERIOD_7 (0x80U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)9170 …_REG_SLOW_PERIOD_8 (0x100U << RADIO_CTRL_CLK32PERIOD_REG_SLOW_PERIOD_Pos)[all …]
