Searched refs:PWR_SR2_SMPSF_Pos (Results 1 – 8 of 8) sorted by relevance
1351 …>CR5, PWR_CR5_SMPSEN, (OperatingMode & PWR_SR2_SMPSF) << (PWR_CR5_SMPSEN_Pos - PWR_SR2_SMPSF_Pos)); in LL_PWR_SMPS_SetMode()1372 …t OperatingMode = (READ_BIT(PWR->CR5, PWR_CR5_SMPSEN) >> (PWR_CR5_SMPSEN_Pos - PWR_SR2_SMPSF_Pos)); in LL_PWR_SMPS_GetMode()
357 #define PWR_FLAG_SMPSBYPF (PWR_FLAG_REG_SR2 | PWR_SR2_SMPSF_Pos) /*!< SMPS Bypa…
923 …>CR5, PWR_CR5_SMPSEN, (OperatingMode & PWR_SR2_SMPSF) << (PWR_CR5_SMPSEN_Pos - PWR_SR2_SMPSF_Pos)); in HAL_PWREx_SMPS_SetMode()
5633 #define PWR_SR2_SMPSF_Pos (1U) macro5634 #define PWR_SR2_SMPSF_Msk (0x1UL << PWR_SR2_SMPSF_Pos) /*!< 0x00000002 */
6375 #define PWR_SR2_SMPSF_Pos (1U) macro6376 #define PWR_SR2_SMPSF_Msk (0x1UL << PWR_SR2_SMPSF_Pos) /*!< 0x00000002 */
6454 #define PWR_SR2_SMPSF_Pos (1U) macro6455 #define PWR_SR2_SMPSF_Msk (0x1UL << PWR_SR2_SMPSF_Pos) /*!< 0x00000002 */
