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Searched refs:PWR_CR_DBP (Results 1 – 25 of 138) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_pwr.h166 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
176 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_DisableBkUpAccess()
186 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_pwr.h195 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
205 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_DisableBkUpAccess()
215 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); in LL_PWR_IsEnabledBkUpAccess()
Dstm32f2xx_hal_pwr.h356 #define DBP_BIT_NUMBER POSITION_VAL(PWR_CR_DBP)
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_pwr.h213 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
223 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_DisableBkUpAccess()
233 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_pwr.h245 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
255 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_DisableBkUpAccess()
265 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_rcc_ex.c187 PWR->CR |= PWR_CR_DBP; in HAL_RCCEx_PeriphCLKConfig()
192 while ((PWR->CR & PWR_CR_DBP) == RESET) in HAL_RCCEx_PeriphCLKConfig()
1108 PWR->CR |= PWR_CR_DBP; in HAL_RCCEx_PeriphCLKConfig()
1113 while ((PWR->CR & PWR_CR_DBP) == RESET) in HAL_RCCEx_PeriphCLKConfig()
1402 PWR->CR |= PWR_CR_DBP; in HAL_RCCEx_PeriphCLKConfig()
1407 while ((PWR->CR & PWR_CR_DBP) == RESET) in HAL_RCCEx_PeriphCLKConfig()
1978 PWR->CR |= PWR_CR_DBP; in HAL_RCCEx_PeriphCLKConfig()
1983 while ((PWR->CR & PWR_CR_DBP) == RESET) in HAL_RCCEx_PeriphCLKConfig()
2373 PWR->CR |= PWR_CR_DBP; in HAL_RCCEx_PeriphCLKConfig()
2378 while ((PWR->CR & PWR_CR_DBP) == RESET) in HAL_RCCEx_PeriphCLKConfig()
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Dstm32f4xx_hal_rcc.c404 if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
407 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCC_OscConfig()
412 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_pwr.h296 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
306 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_DisableBkUpAccess()
316 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_pwr.h296 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
306 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_DisableBkUpAccess()
316 return ((READ_BIT(PWR->CR, PWR_CR_DBP) == PWR_CR_DBP) ? 1UL : 0UL); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_pwr.h560 SET_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_EnableBkUpAccess()
570 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in LL_PWR_DisableBkUpAccess()
580 return (READ_BIT(PWR->CR, PWR_CR_DBP) == (PWR_CR_DBP)); in LL_PWR_IsEnabledBkUpAccess()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_rcc_ex.c129 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
132 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCCEx_PeriphCLKConfig()
137 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
Dstm32l1xx_hal_rcc.c624 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
627 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCC_OscConfig()
632 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_rcc.c529 PWR->CR |= PWR_CR_DBP; in HAL_RCC_OscConfig()
531 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
534 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCC_OscConfig()
539 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
Dstm32f2xx_hal_rcc_ex.c145 PWR->CR |= PWR_CR_DBP; in HAL_RCCEx_PeriphCLKConfig()
150 while((PWR->CR & PWR_CR_DBP) == RESET) in HAL_RCCEx_PeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_rcc_ex.c127 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
130 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCCEx_PeriphCLKConfig()
135 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
Dstm32f0xx_hal_pwr.c88 PWR->CR |= (uint32_t)PWR_CR_DBP; in HAL_PWR_EnableBkUpAccess()
100 PWR->CR &= ~((uint32_t)PWR_CR_DBP); in HAL_PWR_DisableBkUpAccess()
Dstm32f0xx_hal_rcc.c488 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
491 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCC_OscConfig()
496 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_rcc_ex.c125 if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
128 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCCEx_PeriphCLKConfig()
133 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
Dstm32f1xx_hal_rcc.c537 if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
540 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCC_OscConfig()
545 while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/src/
Dstm32f3xx_hal_pwr.c88 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_PWR_EnableBkUpAccess()
100 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in HAL_PWR_DisableBkUpAccess()
Dstm32f3xx_hal_rcc.c510 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
513 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCC_OscConfig()
518 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
Dstm32f3xx_hal_rcc_ex.c130 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
133 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCCEx_PeriphCLKConfig()
138 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_rcc_ex.c133 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
136 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCCEx_PeriphCLKConfig()
141 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCCEx_PeriphCLKConfig()
Dstm32l0xx_hal_pwr.c329 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_PWR_EnableBkUpAccess()
342 CLEAR_BIT(PWR->CR, PWR_CR_DBP); in HAL_PWR_DisableBkUpAccess()
Dstm32l0xx_hal_rcc.c639 if(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()
642 SET_BIT(PWR->CR, PWR_CR_DBP); in HAL_RCC_OscConfig()
647 while(HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP)) in HAL_RCC_OscConfig()

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