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Searched refs:PWR_CR1_LPMS_STOP2_Pos (Results 1 – 25 of 25) sorted by relevance

/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h4988 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
4989 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l412xx.h4772 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
4773 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l433xx.h8553 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
8554 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l451xx.h8727 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
8728 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l442xx.h8689 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
8690 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l431xx.h8470 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
8471 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l432xx.h8473 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
8474 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l443xx.h8769 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
8770 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l471xx.h9425 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
9426 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l452xx.h8787 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
8788 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l462xx.h9003 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
9004 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l475xx.h9580 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
9581 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l476xx.h9603 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
9604 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l486xx.h9819 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
9820 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l485xx.h9796 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
9797 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4a6xx.h10713 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
10714 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l496xx.h10391 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
10392 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4r5xx.h10563 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
10564 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4r7xx.h11044 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
11045 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4s5xx.h10892 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
10893 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4s7xx.h11373 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
11374 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4p5xx.h11337 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
11338 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4q5xx.h11830 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
11831 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4r9xx.h14163 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
14164 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */
Dstm32l4s9xx.h14492 #define PWR_CR1_LPMS_STOP2_Pos (1U) macro
14493 #define PWR_CR1_LPMS_STOP2_Msk (0x1UL << PWR_CR1_LPMS_STOP2_Pos) /*!< 0x00000002 */