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Searched refs:PLLCKSELR (Results 1 – 25 of 43) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_rcc.c374 WRITE_REG(RCC->PLLCKSELR, 0x02020200U); in HAL_RCC_DeInit()
1293 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in HAL_RCC_GetSysClockFreq()
1294 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) ; in HAL_RCC_GetSysClockFreq()
1713 regvalue = RCC->PLLCKSELR; in HAL_RCC_GetOscConfig()
1752 regvalue = RCC->PLLCKSELR; in HAL_RCC_GetOscConfig()
1791 regvalue = RCC->PLLCKSELR; in HAL_RCC_GetOscConfig()
2025 …MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_PLLSRC | (RCC_PLLCKSELR_DIVM1 << ((RCC_PLLCKSELR_DIVM2_P… in RCC_PLL_Config()
2028 if ((RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC) != pllsrc) in RCC_PLL_Config()
2082 …MODIFY_REG(RCC->PLLCKSELR, ((RCC_PLLCKSELR_DIVM1 << (RCC_PLLCKSELR_DIVM1_Pos + ((RCC_PLLCKSELR_DIV… in RCC_PLL_Config()
2104 tmpreg1 = RCC->PLLCKSELR; in RCC_PLL1_GetVCOOutputFreq()
[all …]
Dstm32h7rsxx_ll_rcc.c201 LL_RCC_WriteReg(PLLCKSELR, \ in LL_RCC_DeInit()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal_rcc.c333 RCC->PLLCKSELR = RCC_PLLCKSELR_DIVM1_5 | RCC_PLLCKSELR_DIVM2_5 | RCC_PLLCKSELR_DIVM3_5; in HAL_RCC_DeInit()
425 const uint32_t temp_pllckselr = RCC->PLLCKSELR; in HAL_RCC_OscConfig()
479 const uint32_t temp_pllckselr = RCC->PLLCKSELR; in HAL_RCC_OscConfig()
560 const uint32_t temp_pllckselr = RCC->PLLCKSELR; in HAL_RCC_OscConfig()
858 temp1_pllckcfg = RCC->PLLCKSELR; in HAL_RCC_OscConfig()
1424 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in HAL_RCC_GetSysClockFreq()
1425 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4) ; in HAL_RCC_GetSysClockFreq()
1699 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in HAL_RCC_GetOscConfig()
1700 …RCC_OscInitStruct->PLL.PLLM = (uint32_t)((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_D… in HAL_RCC_GetOscConfig()
Dstm32h7xx_hal_rcc_ex.c1742 …PeriphClkInit->PLL3.PLL3M = (uint32_t)((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> RCC_PLLCKSELR_DIV… in HAL_RCCEx_GetPeriphCLKConfig()
1751 …PeriphClkInit->PLL2.PLL2M = (uint32_t)((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> RCC_PLLCKSELR_DIV… in HAL_RCCEx_GetPeriphCLKConfig()
2953 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in HAL_RCCEx_GetPLL2ClockFreq()
2954 pll2m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM2) >> 12); in HAL_RCCEx_GetPLL2ClockFreq()
3022 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in HAL_RCCEx_GetPLL3ClockFreq()
3023 pll3m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM3) >> 20) ; in HAL_RCCEx_GetPLL3ClockFreq()
3087 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in HAL_RCCEx_GetPLL1ClockFreq()
3088 pll1m = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> 4); in HAL_RCCEx_GetPLL1ClockFreq()
Dstm32h7xx_ll_rcc.c182 RCC->PLLCKSELR = RCC_PLLCKSELR_DIVM1_5 | RCC_PLLCKSELR_DIVM2_5 | RCC_PLLCKSELR_DIVM3_5; in LL_RCC_DeInit()
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dsystem_stm32h7xx.c230 RCC->PLLCKSELR = 0x02020200; in SystemInit()
368 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in SystemCoreClockUpdate()
369 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7rsxx.c219 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in SystemCoreClockUpdate()
220 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos) ; in SystemCoreClockUpdate()
Dstm32h7r3xx.h1424 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs clock source selection register, … member
Dstm32h7s7xx.h1586 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs clock source selection register, … member
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dsystem_stm32h7xx_dualcore_bootcm4_cm7gated.c227 RCC->PLLCKSELR = 0x02020200; in SystemInit()
347 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in SystemCoreClockUpdate()
348 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx_dualcore_bootcm7_cm4gated.c227 RCC->PLLCKSELR = 0x02020200; in SystemInit()
353 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in SystemCoreClockUpdate()
354 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx_dualcore_boot_cm4_cm7.c228 RCC->PLLCKSELR = 0x02020200; in SystemInit()
355 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in SystemCoreClockUpdate()
356 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx_singlecore.c220 RCC->PLLCKSELR = 0x02020200; in SystemInit()
348 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in SystemCoreClockUpdate()
349 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dsystem_stm32h7xx.c235 RCC->PLLCKSELR = 0x02020200; in SystemInit()
373 pllsource = (RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC); in SystemCoreClockUpdate()
374 pllm = ((RCC->PLLCKSELR & RCC_PLLCKSELR_DIVM1)>> 4) ; in SystemCoreClockUpdate()
Dstm32h7a3xx.h1087 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs Clock Source Selection Register, … member
Dstm32h7b0xx.h1090 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs Clock Source Selection Register, … member
Dstm32h7b0xxq.h1091 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs Clock Source Selection Register, … member
Dstm32h7a3xxq.h1088 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs Clock Source Selection Register, … member
Dstm32h7b3xx.h1090 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs Clock Source Selection Register, … member
Dstm32h7b3xxq.h1091 …__IO uint32_t PLLCKSELR; /*!< RCC PLLs Clock Source Selection Register, … member
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_rcc.h3695 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLSRC, PLLSource); in LL_RCC_PLL_SetSource()
3709 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLSRC)); in LL_RCC_PLL_GetSource()
3764 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1 | RCC_PLLCKSELR_PLLSRC, in LL_RCC_PLL1_ConfigDomain_SYS()
4001 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_GetM()
4073 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1, M << RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_SetM()
4507 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM2) >> RCC_PLLCKSELR_DIVM2_Pos); in LL_RCC_PLL2_GetM()
4589 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM2, M << RCC_PLLCKSELR_DIVM2_Pos); in LL_RCC_PLL2_SetM()
5002 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM3) >> RCC_PLLCKSELR_DIVM3_Pos); in LL_RCC_PLL3_GetM()
5074 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM3, M << RCC_PLLCKSELR_DIVM3_Pos); in LL_RCC_PLL3_SetM()
Dstm32h7rsxx_hal_rcc.h3837 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLSRC, (__PLLSOURCE__))
3848 READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLSRC)
3944 …MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_PLLSRC | RCC_PLLCKSELR_DIVM1) , ((__PLLSOURCE__) | ( (__…
4083 MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_DIVM2 | RCC_PLLCKSELR_PLLSRC), \
4223 MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_DIVM3 | RCC_PLLCKSELR_PLLSRC), \
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_rcc.h4300 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLSRC, PLLSource); in LL_RCC_PLL_SetSource()
4314 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLSRC)); in LL_RCC_PLL_GetSource()
4521 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1) >> RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_GetM()
4583 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM1, M << RCC_PLLCKSELR_DIVM1_Pos); in LL_RCC_PLL1_SetM()
4835 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM2) >> RCC_PLLCKSELR_DIVM2_Pos); in LL_RCC_PLL2_GetM()
4897 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM2, M << RCC_PLLCKSELR_DIVM2_Pos); in LL_RCC_PLL2_SetM()
5147 return (uint32_t)(READ_BIT(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM3) >> RCC_PLLCKSELR_DIVM3_Pos); in LL_RCC_PLL3_GetM()
5209 MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_DIVM3, M << RCC_PLLCKSELR_DIVM3_Pos); in LL_RCC_PLL3_SetM()
Dstm32h7xx_hal_rcc_ex.h1838 MODIFY_REG(RCC->PLLCKSELR, ( RCC_PLLCKSELR_DIVM2) , ( (__PLL2M__) <<12U)); \
1959 do{ MODIFY_REG(RCC->PLLCKSELR, ( RCC_PLLCKSELR_DIVM3) , ( (__PLL3M__) <<20U)); \
Dstm32h7xx_hal_rcc.h7592 …do{ MODIFY_REG(RCC->PLLCKSELR, (RCC_PLLCKSELR_PLLSRC | RCC_PLLCKSELR_DIVM1) , ((__RCC_PLLSOURCE__)…
7607 #define __HAL_RCC_PLL_PLLSOURCE_CONFIG(__PLLSOURCE__) MODIFY_REG(RCC->PLLCKSELR, RCC_PLLCKSELR_PLLS…
7687 #define __HAL_RCC_GET_PLL_OSCSOURCE() ((uint32_t)(RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC))
7951 #define RCC_GET_PLL_OSCSOURCE() ((RCC->PLLCKSELR & RCC_PLLCKSELR_PLLSRC) >> RCC_PLLCKSELR_PLLSRC_Po…

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