/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_hal_ospi.c | 2540 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].NCSPort - 1U)], OCTOSPIM_PCR_NCSEN); in HAL_OSPIM_Config() 2548 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKSRC); in HAL_OSPIM_Config() 2551 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSSRC); in HAL_OSPIM_Config() 2555 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], \ in HAL_OSPIM_Config() 2560 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], \ in HAL_OSPIM_Config() 2569 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_OSPIM_Config() 2572 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSEN); in HAL_OSPIM_Config() 2576 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_IO… in HAL_OSPIM_Config() 2580 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_I… in HAL_OSPIM_Config() 2601 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_OSPIM_Config() [all …]
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D | stm32h7xx_ll_fmc.c | 532 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 625 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 669 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 691 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/ |
D | stm32l4xx_hal_ospi.c | 2551 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].NCSPort - 1U)], OCTOSPIM_PCR_NCSEN); in HAL_OSPIM_Config() 2560 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKSRC); in HAL_OSPIM_Config() 2563 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSSRC); in HAL_OSPIM_Config() 2567 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], \ in HAL_OSPIM_Config() 2572 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], \ in HAL_OSPIM_Config() 2582 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_OSPIM_Config() 2585 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSEN); in HAL_OSPIM_Config() 2589 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_IO… in HAL_OSPIM_Config() 2593 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_I… in HAL_OSPIM_Config() 2618 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_OSPIM_Config() [all …]
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D | stm32l4xx_ll_fmc.c | 636 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 729 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 773 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 795 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/ |
D | stm32u5xx_hal_ospi.c | 2667 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].NCSPort - 1U)], OCTOSPIM_PCR_NCSEN); in HAL_OSPIM_Config() 2675 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKSRC); in HAL_OSPIM_Config() 2678 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSSRC); in HAL_OSPIM_Config() 2682 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], \ in HAL_OSPIM_Config() 2687 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], \ in HAL_OSPIM_Config() 2696 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_OSPIM_Config() 2699 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSEN); in HAL_OSPIM_Config() 2703 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_IO… in HAL_OSPIM_Config() 2707 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_I… in HAL_OSPIM_Config() 2728 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_OSPIM_Config() [all …]
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D | stm32u5xx_hal_xspi.c | 2960 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].NCSPort - 1U)], OCTOSPIM_PCR_NCSEN); in HAL_XSPIM_Config() 2968 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKSRC); in HAL_XSPIM_Config() 2971 SET_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSSRC); in HAL_XSPIM_Config() 2975 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], in HAL_XSPIM_Config() 2980 SET_BIT(OCTOSPIM->PCR[((IOM_cfg[other_instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], in HAL_XSPIM_Config() 2989 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_XSPIM_Config() 2992 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[instance].DQSPort - 1U)], OCTOSPIM_PCR_DQSEN); in HAL_XSPIM_Config() 2996 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOLowPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_IO… in HAL_XSPIM_Config() 3000 …CLEAR_BIT(OCTOSPIM->PCR[((IOM_cfg[instance].IOHighPort - 1U)& OSPI_IOM_PORT_MASK)], OCTOSPIM_PCR_I… in HAL_XSPIM_Config() 3020 CLEAR_BIT(OCTOSPIM->PCR[(IOM_cfg[other_instance].ClkPort - 1U)], OCTOSPIM_PCR_CLKEN); in HAL_XSPIM_Config() [all …]
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D | stm32u5xx_ll_fmc.c | 580 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 673 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 717 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 739 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
D | stm32l5xx_ll_fmc.c | 573 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 666 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 710 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 732 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/ |
D | stm32g4xx_ll_fmc.c | 580 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 673 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 717 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 739 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_ll_fmc.c | 531 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 624 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 668 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 690 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/ |
D | stm32n6xx_ll_fmc.c | 529 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 622 WRITE_REG(Device->PCR, 0x0007FE08U); in FMC_NAND_DeInit() 666 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 688 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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D | stm32n6xx_hal_ltdc.c | 1057 CLEAR_BIT(LTDC_LAYER(hltdc, LayerIdx)->PCR, LTDC_LxPCR_YCEN); in HAL_LTDC_ConfigLayer() 3023 MODIFY_REG(LTDC_LAYER(hltdc, LayerIdx)->PCR, LTDC_LxPCR_YCEN, 0U); in HAL_LTDC_ConfigLayerFlexARGB() 3094 …WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->PCR, LTDC_LxPCR_YCEN | (pLayerFlexYUVCoPlanar->FlexYUV.Chro… in HAL_LTDC_ConfigLayerFlexYUVCoPlanar() 3176 …WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->PCR, LTDC_LxPCR_YCEN | pLayerFlexYUVSemiPlanar->FlexYUV.Chr… in HAL_LTDC_ConfigLayerFlexYUVSemiPlanar() 3259 WRITE_REG(LTDC_LAYER(hltdc, LayerIdx)->PCR, LTDC_LxPCR_YCEN | in HAL_LTDC_ConfigLayerFlexYUVFullPlanar()
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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
D | stm32f4xx_ll_fmc.h | 1013 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 1019 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 1030 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN) 1036 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
D | stm32h7rsxx_ll_fmc.c | 546 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 639 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 683 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 705 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
D | stm32h5xx_ll_fmc.c | 599 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 692 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 736 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 758 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/ |
D | stm32f4xx_ll_fmc.c | 636 MODIFY_REG(Device->PCR, PCR_CLEAR_MASK, (Init->Waitfeature | in FMC_NAND_Init() 789 WRITE_REG(Device->PCR, 0x00000018U); in FMC_NAND_DeInit() 844 SET_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Enable() 877 CLEAR_BIT(Device->PCR, FMC_PCR_ECCEN); in FMC_NAND_ECC_Disable()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_ll_fmc.h | 695 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 703 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_ll_fmc.h | 692 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 700 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_ll_fmc.h | 654 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 662 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_ll_fmc.h | 684 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 692 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_ll_fmc.h | 903 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 911 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
D | stm32h7rsxx_ll_fmc.h | 915 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 923 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_ll_fmc.h | 915 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 923 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
D | stm32n6xx_ll_fmc.h | 915 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 923 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_ll_fmc.h | 990 #define __FMC_NAND_ENABLE(__INSTANCE__) ((__INSTANCE__)->PCR |= FMC_PCR_PBKEN) 998 #define __FMC_NAND_DISABLE(__INSTANCE__, __BANK__) CLEAR_BIT((__INSTANCE__)->PCR, FMC_PCR_PBKEN)
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