Home
last modified time | relevance | path

Searched refs:OPAMP1_CSR_FORCEVP_Pos (Results 1 – 25 of 52) sorted by relevance

123

/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f302xc.h2436 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
2437 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32f358xx.h2722 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
2723 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32f303xc.h2764 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
2765 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32f302xe.h2459 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
2460 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32f303xe.h2762 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
2763 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32f398xx.h2718 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
2719 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h12067 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
12068 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h7b0xx.h12390 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
12391 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h7b0xxq.h12391 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
12392 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h7a3xxq.h12068 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
12069 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h7b3xx.h12397 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
12398 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h7b3xxq.h12398 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
12399 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h730xxq.h14307 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14308 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h733xx.h14306 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14307 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h725xx.h13977 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
13978 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h730xx.h14306 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14307 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h735xx.h14307 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14308 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h742xx.h13334 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
13335 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h723xx.h13976 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
13977 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h750xx.h14227 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14228 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h753xx.h14233 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14234 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h745xx.h14488 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14489 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h745xg.h14488 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14489 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h743xx.h13964 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
13965 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */
Dstm32h755xx.h14757 #define OPAMP1_CSR_FORCEVP_Pos (1U) macro
14758 #define OPAMP1_CSR_FORCEVP_Msk (0x1UL << OPAMP1_CSR_FORCEVP_Pos) /*!< 0x00000002 */

123