Searched refs:LL_LPTIM_SHIFT_TAB_CCxE (Results 1 – 6 of 6) sorted by relevance
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_ll_lptim.h | 70 static const uint8_t LL_LPTIM_SHIFT_TAB_CCxE[] = variable 744 SET_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_EnableChannel() 759 CLEAR_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_DisableChannel() 774 …return ((READ_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]) == … in LL_LPTIM_CC_IsEnabledChannel() 775 (0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel])) ? 1UL : 0UL); in LL_LPTIM_CC_IsEnabledChannel()
|
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
D | stm32n6xx_ll_lptim.h | 70 static const uint8_t LL_LPTIM_SHIFT_TAB_CCxE[] = variable 747 SET_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_EnableChannel() 762 CLEAR_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_DisableChannel() 777 …return ((READ_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]) == … in LL_LPTIM_CC_IsEnabledChannel() 778 (0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel])) ? 1UL : 0UL); in LL_LPTIM_CC_IsEnabledChannel()
|
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_ll_lptim.h | 70 static const uint8_t LL_LPTIM_SHIFT_TAB_CCxE[] = variable 805 SET_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_EnableChannel() 820 CLEAR_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_DisableChannel() 835 …return ((READ_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]) == … in LL_LPTIM_CC_IsEnabledChannel() 836 (0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel])) ? 1UL : 0UL); in LL_LPTIM_CC_IsEnabledChannel()
|
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_ll_lptim.h | 70 static const uint8_t LL_LPTIM_SHIFT_TAB_CCxE[] = variable 767 SET_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_EnableChannel() 782 CLEAR_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_DisableChannel() 797 …return ((READ_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]) == … in LL_LPTIM_CC_IsEnabledChannel() 798 (0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel])) ? 1UL : 0UL); in LL_LPTIM_CC_IsEnabledChannel()
|
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
D | stm32h7rsxx_ll_lptim.h | 70 static const uint8_t LL_LPTIM_SHIFT_TAB_CCxE[] = variable 750 SET_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_EnableChannel() 765 CLEAR_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_DisableChannel() 780 …return ((READ_BIT(LPTIMx->CCMR1, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]) == … in LL_LPTIM_CC_IsEnabledChannel() 781 (0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel])) ? 1UL : 0UL); in LL_LPTIM_CC_IsEnabledChannel()
|
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
D | stm32u0xx_ll_lptim.h | 85 static const uint8_t LL_LPTIM_SHIFT_TAB_CCxE[] = variable 841 SET_BIT(*pReg, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_EnableChannel() 861 CLEAR_BIT(*pReg, 0x1UL << LL_LPTIM_SHIFT_TAB_CCxE[Channel]); in LL_LPTIM_CC_DisableChannel() 881 …return ((READ_BIT(*pReg, (uint32_t)LPTIM_CCMR1_CC1E_Pos << LL_LPTIM_SHIFT_TAB_CCxE[Channel]) == … in LL_LPTIM_CC_IsEnabledChannel() 882 ((uint32_t)LPTIM_CCMR1_CC1E_Pos << LL_LPTIM_SHIFT_TAB_CCxE[Channel])) ? 1UL : 0UL); in LL_LPTIM_CC_IsEnabledChannel()
|