/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/ |
D | stm32wlxx_hal_rcc.h | 792 …fine __HAL_RCC_DMA2_CLK_ENABLE() LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2) 797 …ine __HAL_RCC_DMA2_CLK_DISABLE() LL_AHB1_GRP1_DisableClock(LL_AHB1_GRP1_PERIPH_DMA2) 1030 …e __HAL_RCC_DMA2_IS_CLK_ENABLED() LL_AHB1_GRP1_IsEnabledClock(LL_AHB1_GRP1_PERIPH_DMA2) 1179 …efine __HAL_RCC_DMA2_FORCE_RESET() LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2) 1185 …ine __HAL_RCC_DMA2_RELEASE_RESET() LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2) 1355 …__HAL_RCC_DMA2_CLK_SLEEP_ENABLE() LL_AHB1_GRP1_EnableClockSleep(LL_AHB1_GRP1_PERIPH_DMA2) 1360 …_HAL_RCC_DMA2_CLK_SLEEP_DISABLE() LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_DMA2) 1591 …RCC_DMA2_IS_CLK_SLEEP_ENABLED() LL_C2_AHB1_GRP1_IsEnabledClockSleep(LL_AHB1_GRP1_PERIPH_DMA2) 1596 …AL_RCC_DMA2_IS_CLK_SLEEP_ENABLED() LL_AHB1_GRP1_IsEnabledClockSleep(LL_AHB1_GRP1_PERIPH_DMA2)
|
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_hal_rcc.h | 879 #define __HAL_RCC_DMA2_CLK_ENABLE() LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA2) 889 #define __HAL_RCC_DMA2_CLK_DISABLE() LL_AHB1_GRP1_DisableClock(LL_AHB1_GRP1_PERIPH_DMA2) 1081 #define __HAL_RCC_DMA2_IS_CLK_ENABLED() LL_AHB1_GRP1_IsEnabledClock(LL_AHB1_GRP1_PERIPH_DMA2) 1091 …ine __HAL_RCC_DMA2_IS_CLK_DISABLED() !(LL_AHB1_GRP1_IsEnabledClock(LL_AHB1_GRP1_PERIPH_DMA2)) 1731 #define __HAL_RCC_DMA2_FORCE_RESET() LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2) 1743 #define __HAL_RCC_DMA2_RELEASE_RESET() LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2) 1952 …ine __HAL_RCC_DMA2_CLK_SLEEP_ENABLE() LL_AHB1_GRP1_EnableClockSleep(LL_AHB1_GRP1_PERIPH_DMA2) 1963 …ne __HAL_RCC_DMA2_CLK_SLEEP_DISABLE() LL_AHB1_GRP1_DisableClockSleep(LL_AHB1_GRP1_PERIPH_DMA2)
|
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/ |
D | stm32u0xx_ll_dma.c | 153 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 156 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/ |
D | stm32wlxx_ll_dma.c | 144 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 147 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/ |
D | stm32l5xx_ll_dma.c | 154 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 157 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/ |
D | stm32l0xx_ll_dma.c | 172 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 175 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/ |
D | stm32wbxx_ll_dma.c | 173 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 176 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/ |
D | stm32g4xx_ll_dma.c | 166 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 169 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/ |
D | stm32g0xx_ll_dma.c | 162 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 165 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/ |
D | stm32l1xx_ll_dma.c | 172 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 175 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/ |
D | stm32l4xx_ll_dma.c | 184 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 187 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/ |
D | stm32f2xx_ll_dma.c | 178 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 181 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/ |
D | stm32f4xx_ll_dma.c | 176 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 179 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/src/ |
D | stm32f7xx_ll_dma.c | 197 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 200 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
D | stm32h7xx_ll_dma.c | 181 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit() 184 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_DMA2); in LL_DMA_DeInit()
|
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/ |
D | stm32f0xx_ll_bus.h | 75 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHBENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/ |
D | stm32f3xx_ll_bus.h | 75 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHBENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
D | stm32f1xx_ll_bus.h | 79 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHBENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/ |
D | stm32l1xx_ll_bus.h | 92 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHBENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/ |
D | stm32u0xx_ll_bus.h | 83 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHBENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/ |
D | stm32g0xx_ll_bus.h | 75 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHBENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/ |
D | stm32f2xx_ll_bus.h | 82 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_ll_bus.h | 89 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_ll_bus.h | 72 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN macro
|
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
D | stm32f4xx_ll_bus.h | 105 #define LL_AHB1_GRP1_PERIPH_DMA2 RCC_AHB1ENR_DMA2EN macro
|