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Searched refs:I3C_EVR_CFNFF (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_i3c.h140 #define LL_I3C_EVR_CFNFF I3C_EVR_CFNFF
2975 return ((READ_BIT(I3Cx->EVR, I3C_EVR_CFNFF) == (I3C_EVR_CFNFF)) ? 1UL : 0UL); in LL_I3C_IsActiveFlag_CFNF()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_i3c.h140 #define LL_I3C_EVR_CFNFF I3C_EVR_CFNFF
2975 return ((READ_BIT(I3Cx->EVR, I3C_EVR_CFNFF) == (I3C_EVR_CFNFF)) ? 1UL : 0UL); in LL_I3C_IsActiveFlag_CFNF()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_i3c.h143 #define LL_I3C_EVR_CFNFF I3C_EVR_CFNFF
2978 return ((READ_BIT(I3Cx->EVR, I3C_EVR_CFNFF) == (I3C_EVR_CFNFF)) ? 1UL : 0UL); in LL_I3C_IsActiveFlag_CFNF()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_i3c.c7793 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Tx_ISR()
7868 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Rx_ISR()
7952 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Multiple_Xfer_ISR()
8209 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_DAA_ISR()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_i3c.c7799 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Tx_ISR()
7874 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Rx_ISR()
7958 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Multiple_Xfer_ISR()
8215 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_DAA_ISR()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_i3c.c7793 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Tx_ISR()
7868 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Rx_ISR()
7952 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_Multiple_Xfer_ISR()
8209 if (I3C_CHECK_FLAG(itMasks, I3C_EVR_CFNFF) != RESET) in I3C_Ctrl_DAA_ISR()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h12007 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h523xx.h17993 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h562xx.h19537 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h533xx.h18586 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h573xx.h22262 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h563xx.h21669 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h11778 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h7s7xx.h12302 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h7s3xx.h12223 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32h7r7xx.h11855 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h20910 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32n657xx.h21852 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32n655xx.h21610 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro
Dstm32n647xx.h21152 #define I3C_EVR_CFNFF I3C_EVR_CFNFF_Msk /*!< Control FI… macro