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Searched refs:I2C_SR2_SMBHOST_Pos (Results 1 – 25 of 63) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4615 #define I2C_SR2_SMBHOST_Pos (6U) macro
4616 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f101xb.h4677 #define I2C_SR2_SMBHOST_Pos (6U) macro
4678 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f100xb.h5079 #define I2C_SR2_SMBHOST_Pos (6U) macro
5080 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f102x6.h5734 #define I2C_SR2_SMBHOST_Pos (6U) macro
5735 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f100xe.h5593 #define I2C_SR2_SMBHOST_Pos (6U) macro
5594 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f101xg.h5726 #define I2C_SR2_SMBHOST_Pos (6U) macro
5727 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f101xe.h5652 #define I2C_SR2_SMBHOST_Pos (6U) macro
5653 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f102xb.h5788 #define I2C_SR2_SMBHOST_Pos (6U) macro
5789 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h3789 #define I2C_SR2_SMBHOST_Pos (6U) macro
3790 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f410rx.h3789 #define I2C_SR2_SMBHOST_Pos (6U) macro
3790 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f410tx.h3779 #define I2C_SR2_SMBHOST_Pos (6U) macro
3780 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f401xc.h3710 #define I2C_SR2_SMBHOST_Pos (6U) macro
3711 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32f401xe.h3710 #define I2C_SR2_SMBHOST_Pos (6U) macro
3711 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h3576 #define I2C_SR2_SMBHOST_Pos (6U) macro
3577 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l152xba.h3570 #define I2C_SR2_SMBHOST_Pos (6U) macro
3571 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l100xba.h3564 #define I2C_SR2_SMBHOST_Pos (6U) macro
3565 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l100xb.h3558 #define I2C_SR2_SMBHOST_Pos (6U) macro
3559 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l151xb.h3559 #define I2C_SR2_SMBHOST_Pos (6U) macro
3560 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l151xba.h3568 #define I2C_SR2_SMBHOST_Pos (6U) macro
3569 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l100xc.h3666 #define I2C_SR2_SMBHOST_Pos (6U) macro
3667 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l151xc.h3835 #define I2C_SR2_SMBHOST_Pos (6U) macro
3836 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l151xca.h3851 #define I2C_SR2_SMBHOST_Pos (6U) macro
3852 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l151xdx.h3898 #define I2C_SR2_SMBHOST_Pos (6U) macro
3899 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l151xe.h3898 #define I2C_SR2_SMBHOST_Pos (6U) macro
3899 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */
Dstm32l152xc.h3831 #define I2C_SR2_SMBHOST_Pos (6U) macro
3832 #define I2C_SR2_SMBHOST_Msk (0x1UL << I2C_SR2_SMBHOST_Pos) /*!< 0x00000040 */

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