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Searched refs:I2C_OAR1_ADD0_Pos (Results 1 – 25 of 63) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4507 #define I2C_OAR1_ADD0_Pos (0U) macro
4508 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f101xb.h4569 #define I2C_OAR1_ADD0_Pos (0U) macro
4570 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f100xb.h4971 #define I2C_OAR1_ADD0_Pos (0U) macro
4972 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f102x6.h5626 #define I2C_OAR1_ADD0_Pos (0U) macro
5627 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f100xe.h5485 #define I2C_OAR1_ADD0_Pos (0U) macro
5486 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f101xg.h5618 #define I2C_OAR1_ADD0_Pos (0U) macro
5619 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f101xe.h5544 #define I2C_OAR1_ADD0_Pos (0U) macro
5545 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f102xb.h5680 #define I2C_OAR1_ADD0_Pos (0U) macro
5681 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h3681 #define I2C_OAR1_ADD0_Pos (0U) macro
3682 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f410rx.h3681 #define I2C_OAR1_ADD0_Pos (0U) macro
3682 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f410tx.h3671 #define I2C_OAR1_ADD0_Pos (0U) macro
3672 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f401xc.h3602 #define I2C_OAR1_ADD0_Pos (0U) macro
3603 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32f401xe.h3602 #define I2C_OAR1_ADD0_Pos (0U) macro
3603 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h3468 #define I2C_OAR1_ADD0_Pos (0U) macro
3469 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l152xba.h3462 #define I2C_OAR1_ADD0_Pos (0U) macro
3463 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l100xba.h3456 #define I2C_OAR1_ADD0_Pos (0U) macro
3457 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l100xb.h3450 #define I2C_OAR1_ADD0_Pos (0U) macro
3451 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l151xb.h3451 #define I2C_OAR1_ADD0_Pos (0U) macro
3452 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l151xba.h3460 #define I2C_OAR1_ADD0_Pos (0U) macro
3461 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l100xc.h3558 #define I2C_OAR1_ADD0_Pos (0U) macro
3559 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l151xc.h3727 #define I2C_OAR1_ADD0_Pos (0U) macro
3728 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l151xca.h3743 #define I2C_OAR1_ADD0_Pos (0U) macro
3744 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l151xdx.h3790 #define I2C_OAR1_ADD0_Pos (0U) macro
3791 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l151xe.h3790 #define I2C_OAR1_ADD0_Pos (0U) macro
3791 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */
Dstm32l152xc.h3723 #define I2C_OAR1_ADD0_Pos (0U) macro
3724 #define I2C_OAR1_ADD0_Msk (0x1UL << I2C_OAR1_ADD0_Pos) /*!< 0x00000001 */

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