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Searched refs:I2C_CR1_STOP (Results 1 – 25 of 73) sorted by relevance

123

/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_i2c.c1109 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1143 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1150 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1225 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1236 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1291 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1342 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
2556 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2591 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2597 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_i2c.c1109 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1143 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1150 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1225 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1236 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1291 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1342 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
2556 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2591 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2597 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
[all …]
Dstm32f4xx_hal_smbus.c1136 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_Master_Abort_IT()
1474 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_IsDeviceReady()
1495 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_IsDeviceReady()
1689 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_ER_IRQHandler()
1970 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterTransmit_TXE()
2055 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterTransmit_BTF()
2115 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterReceive_RXNE()
2195 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterReceive_BTF()
2309 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_Master_ADDR()
2339 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_Master_ADDR()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_i2c.c1127 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1161 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1168 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1245 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1260 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1329 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1404 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
2613 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2648 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2654 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_i2c.c1109 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1143 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1150 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Transmit()
1225 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1236 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1291 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
1342 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Master_Receive()
2548 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2583 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
2589 SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); in HAL_I2C_Mem_Write()
[all …]
Dstm32l1xx_hal_smbus.c1136 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_Master_Abort_IT()
1474 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_IsDeviceReady()
1495 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_IsDeviceReady()
1689 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in HAL_SMBUS_ER_IRQHandler()
1970 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterTransmit_TXE()
2055 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterTransmit_BTF()
2115 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterReceive_RXNE()
2195 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_MasterReceive_BTF()
2309 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_Master_ADDR()
2339 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_STOP); in SMBUS_Master_ADDR()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_i2c.h1579 SET_BIT(I2Cx->CR1, I2C_CR1_STOP); in LL_I2C_GenerateStopCondition()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_i2c.h1579 SET_BIT(I2Cx->CR1, I2C_CR1_STOP); in LL_I2C_GenerateStopCondition()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_i2c.h1579 SET_BIT(I2Cx->CR1, I2C_CR1_STOP); in LL_I2C_GenerateStopCondition()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_i2c.h1687 SET_BIT(I2Cx->CR1, I2C_CR1_STOP); in LL_I2C_GenerateStopCondition()
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4459 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32f101xb.h4521 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32f100xb.h4923 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32f102x6.h5578 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32f100xe.h5437 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32f101xg.h5570 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32f101xe.h5496 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32f102xb.h5632 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h3633 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!<Stop Generation … macro
Dstm32f410rx.h3633 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!<Stop Generation … macro
Dstm32f410tx.h3623 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!<Stop Generation … macro
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h3420 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32l152xba.h3414 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32l100xba.h3408 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro
Dstm32l100xb.h3402 #define I2C_CR1_STOP I2C_CR1_STOP_Msk /*!< Stop Generation… macro

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