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Searched refs:I2C_CR1_POS (Results 1 – 25 of 73) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/src/
Dstm32f2xx_hal_i2c.c1080 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit()
1201 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1244 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1451 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit()
1581 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive()
1713 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_IT()
1790 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive_IT()
1857 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit_IT()
1919 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive_IT()
1997 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_DMA()
[all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_i2c.c1080 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit()
1201 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1244 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1451 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit()
1581 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive()
1713 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_IT()
1790 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive_IT()
1857 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit_IT()
1919 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive_IT()
1997 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_DMA()
[all …]
Dstm32f4xx_hal_smbus.c959 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Master_Transmit_IT()
1044 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Master_Receive_IT()
1190 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Slave_Transmit_IT()
1256 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Slave_Receive_IT()
1430 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_IsDeviceReady()
2350 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in SMBUS_Master_ADDR()
2693 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in SMBUS_ITError()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/src/
Dstm32f1xx_hal_i2c.c1098 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit()
1221 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1268 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1516 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit()
1646 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive()
1778 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_IT()
1855 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive_IT()
1922 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit_IT()
1984 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive_IT()
2062 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_DMA()
[all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_i2c.c1080 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit()
1201 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1244 SET_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive()
1451 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit()
1581 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive()
1713 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_IT()
1790 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Receive_IT()
1857 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Transmit_IT()
1919 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Slave_Receive_IT()
1997 CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_POS); in HAL_I2C_Master_Transmit_DMA()
[all …]
Dstm32l1xx_hal_smbus.c959 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Master_Transmit_IT()
1044 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Master_Receive_IT()
1190 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Slave_Transmit_IT()
1256 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_Slave_Receive_IT()
1430 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in HAL_SMBUS_IsDeviceReady()
2350 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in SMBUS_Master_ADDR()
2693 CLEAR_BIT(hsmbus->Instance->CR1, I2C_CR1_POS); in SMBUS_ITError()
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_i2c.h1591 SET_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_EnableBitPOS()
1603 CLEAR_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_DisableBitPOS()
1614 return (READ_BIT(I2Cx->CR1, I2C_CR1_POS) == (I2C_CR1_POS)); in LL_I2C_IsEnabledBitPOS()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_i2c.h1591 SET_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_EnableBitPOS()
1603 CLEAR_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_DisableBitPOS()
1614 return (READ_BIT(I2Cx->CR1, I2C_CR1_POS) == (I2C_CR1_POS)); in LL_I2C_IsEnabledBitPOS()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_i2c.h1591 SET_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_EnableBitPOS()
1603 CLEAR_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_DisableBitPOS()
1614 return (READ_BIT(I2Cx->CR1, I2C_CR1_POS) == (I2C_CR1_POS)); in LL_I2C_IsEnabledBitPOS()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_i2c.h1699 SET_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_EnableBitPOS()
1711 CLEAR_BIT(I2Cx->CR1, I2C_CR1_POS); in LL_I2C_DisableBitPOS()
1722 return (READ_BIT(I2Cx->CR1, I2C_CR1_POS) == (I2C_CR1_POS)); in LL_I2C_IsEnabledBitPOS()
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4465 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32f101xb.h4527 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32f100xb.h4929 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32f102x6.h5584 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32f100xe.h5443 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32f101xg.h5576 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32f101xe.h5502 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32f102xb.h5638 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h3639 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!<Acknowledge/PEC … macro
Dstm32f410rx.h3639 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!<Acknowledge/PEC … macro
Dstm32f410tx.h3629 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!<Acknowledge/PEC … macro
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h3426 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32l152xba.h3420 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32l100xba.h3414 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro
Dstm32l100xb.h3408 #define I2C_CR1_POS I2C_CR1_POS_Msk /*!< Acknowledge/PEC… macro

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