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Searched refs:I2C_CR1_PEC (Results 1 – 25 of 69) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_i2c.h1679 SET_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_EnableSMBusPECCompare()
1692 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_DisableSMBusPECCompare()
1705 return (READ_BIT(I2Cx->CR1, I2C_CR1_PEC) == (I2C_CR1_PEC)); in LL_I2C_IsEnabledSMBusPECCompare()
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_i2c.h1679 SET_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_EnableSMBusPECCompare()
1692 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_DisableSMBusPECCompare()
1705 return (READ_BIT(I2Cx->CR1, I2C_CR1_PEC) == (I2C_CR1_PEC)); in LL_I2C_IsEnabledSMBusPECCompare()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_i2c.h1679 SET_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_EnableSMBusPECCompare()
1692 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_DisableSMBusPECCompare()
1705 return (READ_BIT(I2Cx->CR1, I2C_CR1_PEC) == (I2C_CR1_PEC)); in LL_I2C_IsEnabledSMBusPECCompare()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_i2c.h1787 SET_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_EnableSMBusPECCompare()
1800 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PEC); in LL_I2C_DisableSMBusPECCompare()
1813 return (READ_BIT(I2Cx->CR1, I2C_CR1_PEC) == (I2C_CR1_PEC)); in LL_I2C_IsEnabledSMBusPECCompare()
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_hal_smbus.c191 #define SMBUS_SENDPEC_MODE I2C_CR1_PEC
1999 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_PEC); in SMBUS_MasterTransmit_TXE()
2446 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_PEC); in SMBUS_SlaveTransmit_BTF()
2470 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_PEC); in SMBUS_SlaveReceive_RXNE()
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/
Dstm32l1xx_hal_smbus.c191 #define SMBUS_SENDPEC_MODE I2C_CR1_PEC
1999 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_PEC); in SMBUS_MasterTransmit_TXE()
2446 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_PEC); in SMBUS_SlaveTransmit_BTF()
2470 SET_BIT(hsmbus->Instance->CR1, I2C_CR1_PEC); in SMBUS_SlaveReceive_RXNE()
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4468 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32f101xb.h4530 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32f100xb.h4932 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32f102x6.h5587 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32f100xe.h5446 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32f101xg.h5579 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32f101xe.h5505 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32f102xb.h5641 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h3642 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!<Packet Error Che… macro
Dstm32f410rx.h3642 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!<Packet Error Che… macro
Dstm32f410tx.h3632 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!<Packet Error Che… macro
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h3429 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32l152xba.h3423 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32l100xba.h3417 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32l100xb.h3411 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32l151xb.h3412 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32l151xba.h3421 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32l100xc.h3519 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro
Dstm32l151xc.h3688 #define I2C_CR1_PEC I2C_CR1_PEC_Msk /*!< Packet Error Ch… macro

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