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Searched refs:I2C_CR1_ENPEC_Pos (Results 1 – 25 of 63) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h4445 #define I2C_CR1_ENPEC_Pos (5U) macro
4446 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f101xb.h4507 #define I2C_CR1_ENPEC_Pos (5U) macro
4508 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f100xb.h4909 #define I2C_CR1_ENPEC_Pos (5U) macro
4910 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f102x6.h5564 #define I2C_CR1_ENPEC_Pos (5U) macro
5565 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f100xe.h5423 #define I2C_CR1_ENPEC_Pos (5U) macro
5424 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f101xg.h5556 #define I2C_CR1_ENPEC_Pos (5U) macro
5557 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f101xe.h5482 #define I2C_CR1_ENPEC_Pos (5U) macro
5483 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f102xb.h5618 #define I2C_CR1_ENPEC_Pos (5U) macro
5619 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f410cx.h3619 #define I2C_CR1_ENPEC_Pos (5U) macro
3620 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f410rx.h3619 #define I2C_CR1_ENPEC_Pos (5U) macro
3620 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f410tx.h3609 #define I2C_CR1_ENPEC_Pos (5U) macro
3610 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f401xc.h3540 #define I2C_CR1_ENPEC_Pos (5U) macro
3541 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32f401xe.h3540 #define I2C_CR1_ENPEC_Pos (5U) macro
3541 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
/hal_stm32-latest/stm32cube/stm32l1xx/soc/
Dstm32l152xb.h3406 #define I2C_CR1_ENPEC_Pos (5U) macro
3407 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l152xba.h3400 #define I2C_CR1_ENPEC_Pos (5U) macro
3401 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l100xba.h3394 #define I2C_CR1_ENPEC_Pos (5U) macro
3395 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l100xb.h3388 #define I2C_CR1_ENPEC_Pos (5U) macro
3389 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l151xb.h3389 #define I2C_CR1_ENPEC_Pos (5U) macro
3390 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l151xba.h3398 #define I2C_CR1_ENPEC_Pos (5U) macro
3399 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l100xc.h3496 #define I2C_CR1_ENPEC_Pos (5U) macro
3497 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l151xc.h3665 #define I2C_CR1_ENPEC_Pos (5U) macro
3666 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l151xca.h3681 #define I2C_CR1_ENPEC_Pos (5U) macro
3682 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l151xdx.h3728 #define I2C_CR1_ENPEC_Pos (5U) macro
3729 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l151xe.h3728 #define I2C_CR1_ENPEC_Pos (5U) macro
3729 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */
Dstm32l152xc.h3661 #define I2C_CR1_ENPEC_Pos (5U) macro
3662 #define I2C_CR1_ENPEC_Msk (0x1UL << I2C_CR1_ENPEC_Pos) /*!< 0x00000020 */

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