| /hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/ |
| D | stm32f2xx_ll_i2c.h | 860 SET_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_EnableSMBusPEC()
873 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_DisableSMBusPEC()
886 return (READ_BIT(I2Cx->CR1, I2C_CR1_ENPEC) == (I2C_CR1_ENPEC)); in LL_I2C_IsEnabledSMBusPEC()
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| /hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
| D | stm32f1xx_ll_i2c.h | 860 SET_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_EnableSMBusPEC()
873 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_DisableSMBusPEC()
886 return (READ_BIT(I2Cx->CR1, I2C_CR1_ENPEC) == (I2C_CR1_ENPEC)); in LL_I2C_IsEnabledSMBusPEC()
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| /hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/ |
| D | stm32l1xx_ll_i2c.h | 860 SET_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_EnableSMBusPEC()
873 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_DisableSMBusPEC()
886 return (READ_BIT(I2Cx->CR1, I2C_CR1_ENPEC) == (I2C_CR1_ENPEC)); in LL_I2C_IsEnabledSMBusPEC()
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| D | stm32l1xx_hal_smbus.h | 304 #define SMBUS_PEC_ENABLE I2C_CR1_ENPEC
655 #define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC)
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| /hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/ |
| D | stm32f4xx_ll_i2c.h | 968 SET_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_EnableSMBusPEC()
981 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENPEC); in LL_I2C_DisableSMBusPEC()
994 return (READ_BIT(I2Cx->CR1, I2C_CR1_ENPEC) == (I2C_CR1_ENPEC)); in LL_I2C_IsEnabledSMBusPEC()
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| D | stm32f4xx_hal_smbus.h | 304 #define SMBUS_PEC_ENABLE I2C_CR1_ENPEC
663 #define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ENPEC)
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| /hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/ |
| D | stm32f4xx_hal_smbus.c | 362 …MODIFY_REG(hsmbus->Instance->CR1, (I2C_CR1_NOSTRETCH | I2C_CR1_ENGC | I2C_CR1_ENPEC | I2C_CR1_ENAR… in HAL_SMBUS_Init()
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| /hal_stm32-latest/stm32cube/stm32l1xx/drivers/src/ |
| D | stm32l1xx_hal_smbus.c | 362 …MODIFY_REG(hsmbus->Instance->CR1, (I2C_CR1_NOSTRETCH | I2C_CR1_ENGC | I2C_CR1_ENPEC | I2C_CR1_ENAR… in HAL_SMBUS_Init()
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| /hal_stm32-latest/stm32cube/stm32f1xx/soc/ |
| D | stm32f101x6.h | 4447 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32f101xb.h | 4509 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32f100xb.h | 4911 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32f102x6.h | 5566 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32f100xe.h | 5425 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32f101xg.h | 5558 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32f101xe.h | 5484 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32f102xb.h | 5620 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| /hal_stm32-latest/stm32cube/stm32f4xx/soc/ |
| D | stm32f410cx.h | 3621 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!<PEC Enable … macro
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| D | stm32f410rx.h | 3621 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!<PEC Enable … macro
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| D | stm32f410tx.h | 3611 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!<PEC Enable … macro
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| /hal_stm32-latest/stm32cube/stm32l1xx/soc/ |
| D | stm32l152xb.h | 3408 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32l152xba.h | 3402 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32l100xba.h | 3396 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32l100xb.h | 3390 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32l151xb.h | 3391 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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| D | stm32l151xba.h | 3400 #define I2C_CR1_ENPEC I2C_CR1_ENPEC_Msk /*!< PEC Enable */ macro
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