Searched refs:FSMC_PMEM4_MEMWAIT4_Pos (Results 1 – 10 of 10) sorted by relevance
872 ((Timing->WaitSetupTime) << FSMC_PMEM4_MEMWAIT4_Pos) | in FSMC_PCCARD_CommonSpace_Timing_Init()
955 ((Timing->WaitSetupTime) << FSMC_PMEM4_MEMWAIT4_Pos) | in FSMC_PCCARD_CommonSpace_Timing_Init()
7602 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7603 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7605 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7606 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7607 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7608 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7609 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7610 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7611 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7612 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
7452 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7453 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7455 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7456 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7457 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7458 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7459 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7460 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7461 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7462 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
7751 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7752 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7754 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7755 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7756 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7757 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7758 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7759 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7760 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7761 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
7901 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7902 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7904 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7905 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7906 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7907 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7908 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7909 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7910 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7911 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
7496 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7497 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7499 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7500 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7501 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7502 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7503 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7504 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7505 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7506 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
7678 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7679 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7681 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7682 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7683 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7684 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7685 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7686 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7687 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7688 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
7796 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7797 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7799 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7800 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7801 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7802 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7803 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7804 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7805 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7806 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
7975 #define FSMC_PMEM4_MEMWAIT4_Pos (8U) macro7976 #define FSMC_PMEM4_MEMWAIT4_Msk (0xFFUL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x0000FF00 */7978 #define FSMC_PMEM4_MEMWAIT4_0 (0x01UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000100 */7979 #define FSMC_PMEM4_MEMWAIT4_1 (0x02UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000200 */7980 #define FSMC_PMEM4_MEMWAIT4_2 (0x04UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000400 */7981 #define FSMC_PMEM4_MEMWAIT4_3 (0x08UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00000800 */7982 #define FSMC_PMEM4_MEMWAIT4_4 (0x10UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00001000 */7983 #define FSMC_PMEM4_MEMWAIT4_5 (0x20UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00002000 */7984 #define FSMC_PMEM4_MEMWAIT4_6 (0x40UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00004000 */7985 #define FSMC_PMEM4_MEMWAIT4_7 (0x80UL << FSMC_PMEM4_MEMWAIT4_Pos) /*!< 0x00008000 */
