Searched refs:FSMC_PMEM2_MEMWAIT2_Pos (Results 1 – 9 of 9) sorted by relevance
642 … ((Timing->WaitSetupTime) << FSMC_PMEM2_MEMWAIT2_Pos) | in FSMC_NAND_CommonSpace_Timing_Init()650 … ((Timing->WaitSetupTime) << FSMC_PMEM2_MEMWAIT2_Pos) | in FSMC_NAND_CommonSpace_Timing_Init()
7504 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7505 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7507 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7508 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7509 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7510 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7511 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7512 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7513 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7514 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
7354 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7355 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7357 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7358 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7359 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7360 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7361 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7362 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7363 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7364 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
7653 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7654 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7656 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7657 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7658 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7659 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7660 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7661 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7662 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7663 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
7803 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7804 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7806 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7807 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7808 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7809 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7810 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7811 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7812 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7813 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
7398 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7399 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7401 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7402 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7403 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7404 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7405 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7406 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7407 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7408 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
7580 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7581 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7583 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7584 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7585 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7586 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7587 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7588 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7589 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7590 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
7698 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7699 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7701 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7702 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7703 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7704 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7705 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7706 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7707 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7708 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
7877 #define FSMC_PMEM2_MEMWAIT2_Pos (8U) macro7878 #define FSMC_PMEM2_MEMWAIT2_Msk (0xFFUL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x0000FF00 */7880 #define FSMC_PMEM2_MEMWAIT2_0 (0x01UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000100 */7881 #define FSMC_PMEM2_MEMWAIT2_1 (0x02UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000200 */7882 #define FSMC_PMEM2_MEMWAIT2_2 (0x04UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000400 */7883 #define FSMC_PMEM2_MEMWAIT2_3 (0x08UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00000800 */7884 #define FSMC_PMEM2_MEMWAIT2_4 (0x10UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00001000 */7885 #define FSMC_PMEM2_MEMWAIT2_5 (0x20UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00002000 */7886 #define FSMC_PMEM2_MEMWAIT2_6 (0x40UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00004000 */7887 #define FSMC_PMEM2_MEMWAIT2_7 (0x80UL << FSMC_PMEM2_MEMWAIT2_Pos) /*!< 0x00008000 */
