Searched refs:FSMC_PMEM2_MEMHOLD2_Pos (Results 1 – 9 of 9) sorted by relevance
643 … ((Timing->HoldSetupTime) << FSMC_PMEM2_MEMHOLD2_Pos) | in FSMC_NAND_CommonSpace_Timing_Init()651 … ((Timing->HoldSetupTime) << FSMC_PMEM2_MEMHOLD2_Pos) | in FSMC_NAND_CommonSpace_Timing_Init()
7516 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7517 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7519 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7520 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7521 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7522 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7523 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7524 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7525 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7526 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
7366 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7367 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7369 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7370 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7371 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7372 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7373 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7374 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7375 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7376 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
7665 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7666 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7668 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7669 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7670 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7671 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7672 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7673 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7674 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7675 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
7815 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7816 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7818 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7819 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7820 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7821 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7822 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7823 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7824 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7825 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
7410 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7411 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7413 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7414 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7415 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7416 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7417 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7418 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7419 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7420 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
7592 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7593 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7595 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7596 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7597 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7598 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7599 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7600 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7601 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7602 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
7710 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7711 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7713 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7714 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7715 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7716 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7717 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7718 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7719 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7720 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
7889 #define FSMC_PMEM2_MEMHOLD2_Pos (16U) macro7890 #define FSMC_PMEM2_MEMHOLD2_Msk (0xFFUL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00FF0000 */7892 #define FSMC_PMEM2_MEMHOLD2_0 (0x01UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00010000 */7893 #define FSMC_PMEM2_MEMHOLD2_1 (0x02UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00020000 */7894 #define FSMC_PMEM2_MEMHOLD2_2 (0x04UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00040000 */7895 #define FSMC_PMEM2_MEMHOLD2_3 (0x08UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00080000 */7896 #define FSMC_PMEM2_MEMHOLD2_4 (0x10UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00100000 */7897 #define FSMC_PMEM2_MEMHOLD2_5 (0x20UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00200000 */7898 #define FSMC_PMEM2_MEMHOLD2_6 (0x40UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00400000 */7899 #define FSMC_PMEM2_MEMHOLD2_7 (0x80UL << FSMC_PMEM2_MEMHOLD2_Pos) /*!< 0x00800000 */
