Searched refs:FSMC_PCR2_TCLR_Pos (Results 1 – 9 of 9) sorted by relevance
600 ((Init->TCLRSetupTime) << FSMC_PCR2_TCLR_Pos) | in FSMC_NAND_Init()611 ((Init->TCLRSetupTime) << FSMC_PCR2_TCLR_Pos) | in FSMC_NAND_Init()
7311 #define FSMC_PCR2_TCLR_Pos (9U) macro7312 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7314 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7315 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7316 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7317 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
7161 #define FSMC_PCR2_TCLR_Pos (9U) macro7162 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7164 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7165 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7166 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7167 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
7460 #define FSMC_PCR2_TCLR_Pos (9U) macro7461 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7463 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7464 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7465 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7466 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
7610 #define FSMC_PCR2_TCLR_Pos (9U) macro7611 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7613 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7614 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7615 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7616 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
7205 #define FSMC_PCR2_TCLR_Pos (9U) macro7206 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7208 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7209 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7210 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7211 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
7387 #define FSMC_PCR2_TCLR_Pos (9U) macro7388 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7390 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7391 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7392 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7393 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
7505 #define FSMC_PCR2_TCLR_Pos (9U) macro7506 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7508 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7509 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7510 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7511 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
7684 #define FSMC_PCR2_TCLR_Pos (9U) macro7685 #define FSMC_PCR2_TCLR_Msk (0xFUL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001E00 */7687 #define FSMC_PCR2_TCLR_0 (0x1UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000200 */7688 #define FSMC_PCR2_TCLR_1 (0x2UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000400 */7689 #define FSMC_PCR2_TCLR_2 (0x4UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00000800 */7690 #define FSMC_PCR2_TCLR_3 (0x8UL << FSMC_PCR2_TCLR_Pos) /*!< 0x00001000 */
