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Searched refs:FSMC_PATT2_ATTHOLD2_Pos (Results 1 – 9 of 9) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f4xx/drivers/src/
Dstm32f4xx_ll_fsmc.c683 … ((Timing->HoldSetupTime) << FSMC_PATT2_ATTHOLD2_Pos) | in FSMC_NAND_AttributeSpace_Timing_Init()
691 … ((Timing->HoldSetupTime) << FSMC_PATT2_ATTHOLD2_Pos) | in FSMC_NAND_AttributeSpace_Timing_Init()
/hal_stm32-latest/stm32cube/stm32f2xx/soc/
Dstm32f215xx.h7663 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
7664 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
7666 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
7667 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
7668 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
7669 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
7670 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
7671 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
7672 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
7673 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */
Dstm32f205xx.h7513 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
7514 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
7516 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
7517 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
7518 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
7519 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
7520 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
7521 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
7522 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
7523 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */
Dstm32f207xx.h7812 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
7813 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
7815 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
7816 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
7817 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
7818 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
7819 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
7820 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
7821 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
7822 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */
Dstm32f217xx.h7962 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
7963 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
7965 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
7966 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
7967 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
7968 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
7969 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
7970 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
7971 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
7972 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32f4xx/soc/
Dstm32f405xx.h7557 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
7558 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
7560 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
7561 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
7562 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
7563 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
7564 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
7565 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
7566 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
7567 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */
Dstm32f415xx.h7739 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
7740 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
7742 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
7743 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
7744 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
7745 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
7746 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
7747 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
7748 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
7749 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */
Dstm32f407xx.h7857 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
7858 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
7860 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
7861 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
7862 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
7863 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
7864 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
7865 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
7866 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
7867 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */
Dstm32f417xx.h8036 #define FSMC_PATT2_ATTHOLD2_Pos (16U) macro
8037 #define FSMC_PATT2_ATTHOLD2_Msk (0xFFUL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00FF0000 */
8039 #define FSMC_PATT2_ATTHOLD2_0 (0x01UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00010000 */
8040 #define FSMC_PATT2_ATTHOLD2_1 (0x02UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00020000 */
8041 #define FSMC_PATT2_ATTHOLD2_2 (0x04UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00040000 */
8042 #define FSMC_PATT2_ATTHOLD2_3 (0x08UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00080000 */
8043 #define FSMC_PATT2_ATTHOLD2_4 (0x10UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00100000 */
8044 #define FSMC_PATT2_ATTHOLD2_5 (0x20UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00200000 */
8045 #define FSMC_PATT2_ATTHOLD2_6 (0x40UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00400000 */
8046 #define FSMC_PATT2_ATTHOLD2_7 (0x80UL << FSMC_PATT2_ATTHOLD2_Pos) /*!< 0x00800000 */