Searched refs:FSMC_BTR1_CLKDIV_Pos (Results 1 – 15 of 15) sorted by relevance
402 … (((Timing->CLKDivision) - 1U) << FSMC_BTR1_CLKDIV_Pos) | in FSMC_NORSRAM_Timing_Init()410 tmpr = (uint32_t)(Device->BTCR[FSMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FSMC_BTR1_CLKDIV_Pos)); in FSMC_NORSRAM_Timing_Init()411 tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FSMC_BTR1_CLKDIV_Pos); in FSMC_NORSRAM_Timing_Init()
333 ((Timing->CLKDivision - 1U) << FSMC_BTR1_CLKDIV_Pos) | in FSMC_NORSRAM_Timing_Init()
6919 #define FSMC_BTR1_CLKDIV_Pos (20U) macro6920 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */6922 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */6923 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */6924 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */6925 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
6769 #define FSMC_BTR1_CLKDIV_Pos (20U) macro6770 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */6772 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */6773 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */6774 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */6775 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
7068 #define FSMC_BTR1_CLKDIV_Pos (20U) macro7069 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */7071 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */7072 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */7073 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */7074 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
7218 #define FSMC_BTR1_CLKDIV_Pos (20U) macro7219 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */7221 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */7222 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */7223 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */7224 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
6813 #define FSMC_BTR1_CLKDIV_Pos (20U) macro6814 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */6816 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */6817 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */6818 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */6819 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
6995 #define FSMC_BTR1_CLKDIV_Pos (20U) macro6996 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */6998 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */6999 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */7000 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */7001 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
7287 #define FSMC_BTR1_CLKDIV_Pos (20U) macro7288 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */7290 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */7291 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */7292 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */7293 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
7113 #define FSMC_BTR1_CLKDIV_Pos (20U) macro7114 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */7116 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */7117 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */7118 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */7119 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
6931 #define FSMC_BTR1_CLKDIV_Pos (20U) macro6932 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */6934 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */6935 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */6936 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */6937 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
6925 #define FSMC_BTR1_CLKDIV_Pos (20U) macro6926 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */6928 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */6929 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */6930 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */6931 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
6927 #define FSMC_BTR1_CLKDIV_Pos (20U) macro6928 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */6930 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */6931 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */6932 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */6933 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
7251 #define FSMC_BTR1_CLKDIV_Pos (20U) macro7252 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */7254 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */7255 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */7256 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */7257 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
7292 #define FSMC_BTR1_CLKDIV_Pos (20U) macro7293 #define FSMC_BTR1_CLKDIV_Msk (0xFUL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00F00000 */7295 #define FSMC_BTR1_CLKDIV_0 (0x1UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00100000 */7296 #define FSMC_BTR1_CLKDIV_1 (0x2UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00200000 */7297 #define FSMC_BTR1_CLKDIV_2 (0x4UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00400000 */7298 #define FSMC_BTR1_CLKDIV_3 (0x8UL << FSMC_BTR1_CLKDIV_Pos) /*!< 0x00800000 */
