| /hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/ |
| D | stm32mp1xx_ll_fmc.h | 109 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
446 #define __FMC_ENABLE() (FMC_Bank1_R->BTCR[0] |= FMC_BCR1_FMCEN)
452 #define __FMC_DISABLE() (FMC_Bank1_R->BTCR[0] &= ~FMC_BCR1_FMCEN)
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| /hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
| D | stm32u5xx_ll_fmc.h | 145 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
653 #define __FMC_ENABLE() (FMC_Bank1_R->BTCR[0] |= FMC_BCR1_FMCEN)
659 #define __FMC_DISABLE() (FMC_Bank1_R->BTCR[0] &= ~FMC_BCR1_FMCEN)
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_ll_fmc.h | 182 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
871 #define __FMC_ENABLE() (FMC_Bank1_R->BTCR[0] |= FMC_BCR1_FMCEN)
877 #define __FMC_DISABLE() (FMC_Bank1_R->BTCR[0] &= ~FMC_BCR1_FMCEN)
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_ll_fmc.h | 182 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
871 #define __FMC_ENABLE() (FMC_Bank1_R->BTCR[0] |= FMC_BCR1_FMCEN)
877 #define __FMC_DISABLE() (FMC_Bank1_R->BTCR[0] &= ~FMC_BCR1_FMCEN)
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_ll_fmc.h | 199 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
943 #define __FMC_ENABLE() (FMC_Bank1_R->BTCR[0] |= FMC_BCR1_FMCEN)
949 #define __FMC_DISABLE() (FMC_Bank1_R->BTCR[0] &= ~FMC_BCR1_FMCEN)
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| D | stm32h5xx_hal_gtzc.h | 354 #if defined (FMC_Bank1_R)
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal.c | 1069 MODIFY_REG(FMC_Bank1_R->BTCR[0], FMC_BCR1_BMAP, BankMapConfig); in HAL_SetFMCMemorySwappingConfig()
1079 return READ_BIT(FMC_Bank1_R->BTCR[0], FMC_BCR1_BMAP); in HAL_GetFMCMemorySwappingConfig()
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
| D | system_stm32h7xx.c | 293 FMC_Bank1_R->BTCR[0] = 0x000030D2; in SystemInit()
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| /hal_stm32-latest/stm32cube/stm32h7xx/soc/ |
| D | system_stm32h7xx_dualcore_bootcm4_cm7gated.c | 272 FMC_Bank1_R->BTCR[0] = 0x000030D2; in SystemInit()
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| D | system_stm32h7xx_dualcore_bootcm7_cm4gated.c | 277 FMC_Bank1_R->BTCR[0] = 0x000030D2; in SystemInit()
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| D | system_stm32h7xx_dualcore_boot_cm4_cm7.c | 279 FMC_Bank1_R->BTCR[0] = 0x000030D2; in SystemInit()
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| D | system_stm32h7xx_singlecore.c | 276 FMC_Bank1_R->BTCR[0] = 0x000030D2; in SystemInit()
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| D | system_stm32h7xx.c | 298 FMC_Bank1_R->BTCR[0] = 0x000030D2; in SystemInit()
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| /hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
| D | stm32l4xx_ll_fmc.h | 151 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
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| D | stm32l4xx_ll_bus.h | 150 #if defined(FMC_Bank1_R)
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| D | stm32l4xx_ll_system.h | 90 #if defined(FMC_Bank1_R)
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| /hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
| D | stm32l5xx_ll_fmc.h | 136 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
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| /hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
| D | stm32g4xx_ll_fmc.h | 145 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
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| D | stm32g4xx_ll_bus.h | 122 #if defined(FMC_Bank1_R)
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| D | stm32g4xx_ll_system.h | 90 #if defined(FMC_Bank1_R)
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_ll_fmc.h | 188 #define FMC_NORSRAM_DEVICE FMC_Bank1_R
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| /hal_stm32-latest/stm32cube/stm32l5xx/soc/ |
| D | stm32l552xx.h | 2473 #define FMC_Bank1_R FMC_Bank1_R_S macro
2887 #define FMC_Bank1_R FMC_Bank1_R_NS macro
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| D | stm32l562xx.h | 2596 #define FMC_Bank1_R FMC_Bank1_R_S macro
3031 #define FMC_Bank1_R FMC_Bank1_R_NS macro
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| /hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
| D | stm32h523xx.h | 2554 #define FMC_Bank1_R FMC_Bank1_R_S macro
2888 #define FMC_Bank1_R FMC_Bank1_R_NS macro
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| D | stm32h562xx.h | 2814 #define FMC_Bank1_R FMC_Bank1_R_S macro
3224 #define FMC_Bank1_R FMC_Bank1_R_NS macro
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