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Searched refs:FMC_BASE (Results 1 – 25 of 48) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_gpio_ex.h238 #if defined(FMC_BASE)
253 #if defined(FMC_BASE)
289 #if defined(FMC_BASE)
Dstm32u5xx_hal_gtzc.h276 #if defined (FMC_BASE)
312 #if defined (FMC_BASE)
Dstm32u5xx_hal_rcc.h1117 #if defined(FMC_BASE)
1260 #if defined(FMC_BASE)
2167 #if defined(FMC_BASE)
2270 #if defined(FMC_BASE)
2747 #if defined(FMC_BASE)
2839 #if defined(FMC_BASE)
3347 #if defined(FMC_BASE)
3454 #if defined(FMC_BASE)
Dstm32u5xx_ll_bus.h191 #if defined(FMC_BASE)
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1174 #if defined(FMC_BASE)
1206 #if defined(FMC_BASE)
2295 #if defined(FMC_BASE)
2315 #if defined(FMC_BASE)
2955 #if defined(FMC_BASE)
2971 #if defined(FMC_BASE)
2979 #if defined(FMC_BASE)
2995 #if defined(FMC_BASE)
3657 #if defined(FMC_BASE)
3677 #if defined(FMC_BASE)
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f302xe.h751 #define FMC_BASE 0x60000000UL /*!< FMC base address … macro
849 #define FMC_BANK1 (FMC_BASE) /*!< FMC Bank1 base address */
855 #define FMC_BANK2 (FMC_BASE + 0x10000000UL) /*!< FMC Bank2 base address */
856 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Bank3 base address */
857 #define FMC_BANK4 (FMC_BASE + 0x30000000UL) /*!< FMC Bank4 base address */
Dstm32f303xe.h778 #define FMC_BASE 0x60000000UL /*!< FMC base address … macro
887 #define FMC_BANK1 (FMC_BASE) /*!< FMC Bank1 base address */
893 #define FMC_BANK2 (FMC_BASE + 0x10000000UL) /*!< FMC Bank2 base address */
894 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Bank3 base address */
895 #define FMC_BANK4 (FMC_BASE + 0x30000000UL) /*!< FMC Bank4 base address */
Dstm32f398xx.h737 #define FMC_BASE 0x60000000UL /*!< FMC base address … macro
844 #define FMC_BANK1 (FMC_BASE) /*!< FMC Bank1 base address */
850 #define FMC_BANK2 (FMC_BASE + 0x10000000UL) /*!< FMC Bank2 base address */
851 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Bank3 base address */
852 #define FMC_BANK4 (FMC_BASE + 0x30000000UL) /*!< FMC Bank4 base address */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h523xx.h1488 #define FMC_BASE (0x60000000UL) /*!< FMC base address … macro
1491 #define FMC_BANK1 FMC_BASE
1496 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Memory Bank3 for NAND */
1497 #define FMC_SDRAM_BANK_1 (FMC_BASE + 0x60000000UL) /*!< FMC Memory SDRAM Bank1 */
1498 #define FMC_SDRAM_BANK_2 (FMC_BASE + 0x70000000UL) /*!< FMC Memory SDRAM Bank2 */
Dstm32h562xx.h1577 #define FMC_BASE (0x60000000UL) /*!< FMC base address … macro
1580 #define FMC_BANK1 FMC_BASE
1585 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Memory Bank3 for NAND */
1586 #define FMC_SDRAM_BANK_1 (FMC_BASE + 0x60000000UL) /*!< FMC Memory SDRAM Bank1 */
1587 #define FMC_SDRAM_BANK_2 (FMC_BASE + 0x70000000UL) /*!< FMC Memory SDRAM Bank2 */
Dstm32h533xx.h1552 #define FMC_BASE (0x60000000UL) /*!< FMC base address … macro
1555 #define FMC_BANK1 FMC_BASE
1560 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Memory Bank3 for NAND */
1561 #define FMC_SDRAM_BANK_1 (FMC_BASE + 0x60000000UL) /*!< FMC Memory SDRAM Bank1 */
1562 #define FMC_SDRAM_BANK_2 (FMC_BASE + 0x70000000UL) /*!< FMC Memory SDRAM Bank2 */
Dstm32h573xx.h1819 #define FMC_BASE (0x60000000UL) /*!< FMC base address … macro
1822 #define FMC_BANK1 FMC_BASE
1827 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Memory Bank3 for NAND */
1828 #define FMC_SDRAM_BANK_1 (FMC_BASE + 0x60000000UL) /*!< FMC Memory SDRAM Bank1 */
1829 #define FMC_SDRAM_BANK_2 (FMC_BASE + 0x70000000UL) /*!< FMC Memory SDRAM Bank2 */
Dstm32h563xx.h1755 #define FMC_BASE (0x60000000UL) /*!< FMC base address … macro
1758 #define FMC_BANK1 FMC_BASE
1763 #define FMC_BANK3 (FMC_BASE + 0x20000000UL) /*!< FMC Memory Bank3 for NAND */
1764 #define FMC_SDRAM_BANK_1 (FMC_BASE + 0x60000000UL) /*!< FMC Memory SDRAM Bank1 */
1765 #define FMC_SDRAM_BANK_2 (FMC_BASE + 0x70000000UL) /*!< FMC Memory SDRAM Bank2 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g473xx.h1023 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1046 #define FMC_BANK1 FMC_BASE
1051 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32g483xx.h1055 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1078 #define FMC_BANK1 FMC_BASE
1083 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32g474xx.h1137 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1160 #define FMC_BANK1 FMC_BASE
1165 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32g484xx.h1169 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1192 #define FMC_BANK1 FMC_BASE
1197 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l471xx.h999 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1025 #define FMC_BANK1 FMC_BASE
1030 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32l475xx.h1118 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1144 #define FMC_BANK1 FMC_BASE
1149 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32l476xx.h1133 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1159 #define FMC_BANK1 FMC_BASE
1164 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32l486xx.h1166 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1192 #define FMC_BANK1 FMC_BASE
1197 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32l485xx.h1151 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1177 #define FMC_BANK1 FMC_BASE
1182 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32l4a6xx.h1264 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1290 #define FMC_BANK1 FMC_BASE
1295 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
Dstm32l496xx.h1206 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1232 #define FMC_BANK1 FMC_BASE
1237 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)
/hal_stm32-latest/stm32cube/stm32l5xx/soc/
Dstm32l552xx.h1334 #define FMC_BASE (0x60000000UL) /*!< FMC base address */ macro
1337 #define FMC_BANK1 FMC_BASE
1342 #define FMC_BANK3 (FMC_BASE + 0x20000000UL)

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