Searched refs:ETH_DMARXNDESCRF_IOC (Results 1 – 10 of 10) sorted by relevance
| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/Legacy/ |
| D | stm32h7xx_hal_eth.c | 806 SET_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_Start_IT()
932 CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_Stop_IT()
1173 SET_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_IsRxDataAvailable()
1444 SET_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_BuildRxDescriptors()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
| D | stm32h5xx_hal_eth.h | 875 #define ETH_DMARXNDESCRF_IOC 0x40000000U /*!< Interrupt Enabled on Completion */ macro
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
| D | stm32h7rsxx_hal_eth.h | 875 #define ETH_DMARXNDESCRF_IOC 0x40000000U /*!< Interrupt Enabled on Completion */ macro
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
| D | stm32h7xx_hal_eth.h | 875 #define ETH_DMARXNDESCRF_IOC 0x40000000U /*!< Interrupt Enabled on Completion */ macro
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/Legacy/ |
| D | stm32h7xx_hal_eth_legacy.h | 747 #define ETH_DMARXNDESCRF_IOC ((uint32_t)0x40000000U) /*!< Interrupt Enabled on Completion … macro
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| /hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/ |
| D | stm32h7rsxx_hal_eth.c | 895 CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_Stop_IT()
1194 … WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); in ETH_UpdateDescriptor()
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| /hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/ |
| D | stm32h7xx_hal_eth.c | 895 CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_Stop_IT()
1203 … WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); in ETH_UpdateDescriptor()
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| /hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/ |
| D | stm32h5xx_hal_eth.c | 895 CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_Stop_IT()
1203 … WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); in ETH_UpdateDescriptor()
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
| D | stm32n6xx_hal_eth.h | 926 #define ETH_DMARXNDESCRF_IOC 0x40000000U /*!< Interrupt Enabled on Completion */ macro
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| /hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/ |
| D | stm32n6xx_hal_eth.c | 923 CLEAR_BIT(dmarxdesc->DESC3, ETH_DMARXNDESCRF_IOC); in HAL_ETH_Stop_IT()
1249 … WRITE_REG(dmarxdesc->DESC3, ETH_DMARXNDESCRF_OWN | ETH_DMARXNDESCRF_BUF1V | ETH_DMARXNDESCRF_IOC); in ETH_UpdateDescriptor()
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