Searched refs:ETH_DMARXDESC_OWN (Results 1 – 12 of 12) sorted by relevance
229 #define IS_ETH_DMARXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMARXDESC_OWN) || \848 #define ETH_DMARXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */ macro1660 …T_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status |= ETH_DMARXDESC_OWN)
229 #define IS_ETH_DMARXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMARXDESC_OWN) || \820 #define ETH_DMARXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */ macro1589 …T_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status |= ETH_DMARXDESC_OWN)
229 #define IS_ETH_DMARXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMARXDESC_OWN) || \844 #define ETH_DMARXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */ macro1656 …T_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status |= ETH_DMARXDESC_OWN)
615 DMARxDesc->Status = ETH_DMARXDESC_OWN; in HAL_ETH_DMARxDescListInit()1011 if (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()1090 …while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter <… in HAL_ETH_GetReceivedFrame_IT()
617 DMARxDesc->Status = ETH_DMARXDESC_OWN; in HAL_ETH_DMARxDescListInit()1015 if(((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()1094 …while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter <… in HAL_ETH_GetReceivedFrame_IT()
609 DMARxDesc->Status = ETH_DMARXDESC_OWN; in HAL_ETH_DMARxDescListInit()1005 if (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()1084 …while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter <… in HAL_ETH_GetReceivedFrame_IT()
229 #define IS_ETH_DMARXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMARXDESC_OWN) || \849 #define ETH_DMARXDESC_OWN ((uint32_t)0x80000000U) /*!< OWN bit: descriptor is owned by DMA… macro1661 …T_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status |= ETH_DMARXDESC_OWN)
621 DMARxDesc->Status = ETH_DMARXDESC_OWN; in HAL_ETH_DMARxDescListInit()1017 if(((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET)) in HAL_ETH_GetReceivedFrame()1096 …while (((heth->RxDesc->Status & ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (descriptorscancounter <… in HAL_ETH_GetReceivedFrame_IT()
1108 …while ((READ_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN) == (uint32_t)RESET) && (desccnt < desccntmax) in HAL_ETH_ReadData()1244 SET_BIT(dmarxdesc->DESC0, ETH_DMARXDESC_OWN); in ETH_UpdateDescriptor()3013 dmarxdesc->DESC0 = ETH_DMARXDESC_OWN; in ETH_DMARxDescListInit()
777 #define ETH_DMARXDESC_OWN 0x80000000U /*!< OWN bit: descriptor is owned by DMA engine */ macro