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Searched refs:DMA_PRIVCFGR_PRIV5_Pos (Results 1 – 25 of 30) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3721 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
3722 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h523xx.h5027 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
5028 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h562xx.h5470 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
5471 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h533xx.h5436 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
5437 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h573xx.h7963 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
7964 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h563xx.h7554 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
7555 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h2650 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
2651 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32wba54xx.h2833 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
2834 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32wba5mxx.h2833 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
2834 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32wba55xx.h2833 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
2834 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6022 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6023 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u535xx.h5622 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
5623 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u575xx.h6021 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6022 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u585xx.h6470 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6471 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u595xx.h6277 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6278 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u5a5xx.h6726 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6727 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u5f7xx.h6573 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6574 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u599xx.h6565 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6566 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u5g7xx.h7022 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
7023 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u5f9xx.h6693 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
6694 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32u5a9xx.h7014 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
7015 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h4779 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
4780 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h7s7xx.h5303 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
5304 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h7s3xx.h5224 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
5225 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
Dstm32h7r7xx.h4856 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro
4857 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…

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