/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 3721 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 3722 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h523xx.h | 5027 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 5028 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h562xx.h | 5470 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 5471 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h533xx.h | 5436 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 5437 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h573xx.h | 7963 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 7964 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h563xx.h | 7554 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 7555 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba52xx.h | 2650 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 2651 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32wba54xx.h | 2833 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 2834 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32wba5mxx.h | 2833 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 2834 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32wba55xx.h | 2833 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 2834 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 6022 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6023 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u535xx.h | 5622 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 5623 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u575xx.h | 6021 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6022 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u585xx.h | 6470 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6471 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u595xx.h | 6277 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6278 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u5a5xx.h | 6726 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6727 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u5f7xx.h | 6573 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6574 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u599xx.h | 6565 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6566 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u5g7xx.h | 7022 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 7023 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u5f9xx.h | 6693 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 6694 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32u5a9xx.h | 7014 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 7015 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 4779 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 4780 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h7s7xx.h | 5303 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 5304 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h7s3xx.h | 5224 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 5225 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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D | stm32h7r7xx.h | 4856 #define DMA_PRIVCFGR_PRIV5_Pos (5U) macro 4857 #define DMA_PRIVCFGR_PRIV5_Msk (0x1UL << DMA_PRIVCFGR_PRIV5_Pos) /*!< 0x00000020…
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