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Searched refs:DMA_PRIVCFGR_PRIV0 (Results 1 – 25 of 39) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_dma.c323 #if defined (DMA_PRIVCFGR_PRIV0) in HAL_DMA_DeInit()
336 #if defined (DMA_PRIVCFGR_PRIV0) in HAL_DMA_DeInit()
368 #if defined (DMA_PRIVCFGR_PRIV0) in HAL_DMA_DeInit()
1350 #if defined (DMA_PRIVCFGR_PRIV0)
Dstm32wbaxx_hal_dma_ex.c636 #if defined (DMA_PRIVCFGR_PRIV0) in HAL_DMAEx_List_DeInit()
652 #if defined (DMA_PRIVCFGR_PRIV0) in HAL_DMAEx_List_DeInit()
685 #if defined (DMA_PRIVCFGR_PRIV0) in HAL_DMAEx_List_DeInit()
Dstm32wbaxx_ll_dma.c296 #if defined (DMA_PRIVCFGR_PRIV0) in LL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h3535 #if defined (DMA_PRIVCFGR_PRIV0)
3554 SET_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelPrivilege()
3575 CLEAR_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelPrivilege()
3596 return ((READ_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelPrivilege()
3597 == (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelPrivilege()
Dstm32wbaxx_hal_dma.h667 #if defined (DMA_PRIVCFGR_PRIV0)
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h5338 SET_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelPrivilege()
5359 CLEAR_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelPrivilege()
5380 return ((READ_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelPrivilege()
5381 == (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelPrivilege()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h5637 SET_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelPrivilege()
5666 CLEAR_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelPrivilege()
5695 return ((READ_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelPrivilege()
5696 == (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelPrivilege()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h5367 SET_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelPrivilege()
5396 CLEAR_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelPrivilege()
5425 return ((READ_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelPrivilege()
5426 == (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelPrivilege()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h6774 SET_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_EnableChannelPrivilege()
6803 CLEAR_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))); in LL_DMA_DisableChannelPrivilege()
6832 return ((READ_BIT(DMAx->PRIVCFGR, (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) in LL_DMA_IsEnabledChannelPrivilege()
6833 == (DMA_PRIVCFGR_PRIV0 << (Channel & 0x0000000FU))) ? 1UL : 0UL); in LL_DMA_IsEnabledChannelPrivilege()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3708 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32h523xx.h5014 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32h562xx.h5457 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32h533xx.h5423 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32h573xx.h7950 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32h563xx.h7541 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba52xx.h2637 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32wba54xx.h2820 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32wba5mxx.h2820 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32wba55xx.h2820 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6009 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32u535xx.h5609 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32u575xx.h6008 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h4766 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32h7s7xx.h5290 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro
Dstm32h7s3xx.h5211 #define DMA_PRIVCFGR_PRIV0 DMA_PRIVCFGR_PRIV0_Msk /*!< Privileged… macro

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