Searched refs:DMA_CTR2_TRIGM_0 (Results 1 – 25 of 40) sorted by relevance
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273 #define DMA_TRIGM_REPEATED_BLOCK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is condit…
815 #define LL_DMA_TRIGM_RPT_BLK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is conditi…
269 #define DMA_TRIGM_REPEATED_BLOCK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is condit…
836 #define LL_DMA_TRIGM_RPT_BLK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is conditi…
275 #define DMA_TRIGM_REPEATED_BLOCK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is condit…
834 #define LL_DMA_TRIGM_RPT_BLK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is conditi…
274 #define DMA_TRIGM_REPEATED_BLOCK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is condit…
860 #define LL_DMA_TRIGM_RPT_BLK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is conditi…
687 #define LL_DMA_TRIGM_RPT_BLK_TRANSFER DMA_CTR2_TRIGM_0 /*!< A repeated block transfer is conditi…
2319 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
2904 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
3087 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
3922 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
5284 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
5727 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
5693 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
8220 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
6372 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
5972 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
6371 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
5079 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
5603 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro
5524 #define DMA_CTR2_TRIGM_0 (0x1UL << DMA_CTR2_TRIGM_Pos) /*!< Bit 0 */ macro