Home
last modified time | relevance | path

Searched refs:DMA_CTR1_SINC (Results 1 – 25 of 51) sorted by relevance

123

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h628 #define LL_DMA_SRC_INCREMENT DMA_CTR1_SINC /*!< Source incremented single/burst */
1414 … DMA_CTR1_DAP | DMA_CTR1_DHX | DMA_CTR1_DBX | DMA_CTR1_SBX | DMA_CTR1_DINC | DMA_CTR1_SINC | \ in LL_DMA_ConfigTransfer()
2121 …A_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC, SrcInc); in LL_DMA_SetSrcIncMode()
2145 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC)); in LL_DMA_GetSrcIncMode()
Dstm32wbaxx_hal_dma.h357 #define DMA_SINC_INCREMENTED DMA_CTR1_SINC /*!< Source incremented single / burst */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_ospi.c1513 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_INCREMENTED | DMA_DINC_FIXED)); in HAL_OSPI_Transmit_DMA()
1539 MODIFY_REG(hospi->hdma->Instance->CTR1, (DMA_CTR1_SINC | DMA_CTR1_DINC), \ in HAL_OSPI_Transmit_DMA()
1695 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_FIXED | DMA_DINC_INCREMENTED)); in HAL_OSPI_Receive_DMA()
1724 MODIFY_REG(hospi->hdma->Instance->CTR1, (DMA_CTR1_SINC | DMA_CTR1_DINC), \ in HAL_OSPI_Receive_DMA()
Dstm32u5xx_hal_xspi.c1677 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_INCREMENTED | DMA_DINC_FIXED)); in HAL_XSPI_Transmit_DMA()
1863 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_FIXED | DMA_DINC_INCREMENTED)); in HAL_XSPI_Receive_DMA()
Dstm32u5xx_hal_dma_ex.c3948 …nit.SrcInc = pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_SINC; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h756 #define LL_DMA_SRC_INCREMENT DMA_CTR1_SINC /*!< Source incremented single/burst */
2053 … DMA_CTR1_DAP | DMA_CTR1_DHX | DMA_CTR1_DBX | DMA_CTR1_SBX | DMA_CTR1_DINC | DMA_CTR1_SINC | \ in LL_DMA_ConfigTransfer()
2761 …A_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC, SrcInc); in LL_DMA_SetSrcIncMode()
2785 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC)); in LL_DMA_GetSrcIncMode()
Dstm32h5xx_hal_dma.h697 #define DMA_SINC_INCREMENTED DMA_CTR1_SINC /*!< Source incremented single / burst */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h775 #define LL_DMA_SRC_INCREMENT DMA_CTR1_SINC /*!< Source incremented single/burst */
1969 … DMA_CTR1_DAP | DMA_CTR1_DHX | DMA_CTR1_DBX | DMA_CTR1_SBX | DMA_CTR1_DINC | DMA_CTR1_SINC | \ in LL_DMA_ConfigTransfer()
2923 …A_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC, SrcInc); in LL_DMA_SetSrcIncMode()
2955 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC)); in LL_DMA_GetSrcIncMode()
Dstm32u5xx_hal_dma.h452 #define DMA_SINC_INCREMENTED DMA_CTR1_SINC /*!< Source incremented single / burst */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h776 #define LL_DMA_SRC_INCREMENT DMA_CTR1_SINC /*!< Source incremented single/burst */
1938 …DMA_CTR1_SINC | DMA_CTR1_SAP | DMA_CTR1_PAM | DMA_CTR1_DDW_LOG2 | DMA_CTR1_SDW_LOG2, Configuration… in LL_DMA_ConfigTransfer()
2715 …A_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC, SrcInc); in LL_DMA_SetSrcIncMode()
2747 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC)); in LL_DMA_GetSrcIncMode()
Dstm32h7rsxx_hal_dma.h421 #define DMA_SINC_INCREMENTED DMA_CTR1_SINC /*!< Source incremented single / burst */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h800 #define LL_DMA_SRC_INCREMENT DMA_CTR1_SINC /*!< Source incremented single/burst */
2360 …DMA_CTR1_SINC | DMA_CTR1_SAP | DMA_CTR1_PAM | DMA_CTR1_DDW_LOG2 | DMA_CTR1_SDW_LOG2, Configuration… in LL_DMA_ConfigTransfer()
3531 …A_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC, SrcInc); in LL_DMA_SetSrcIncMode()
3563 …IT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_SINC)); in LL_DMA_GetSrcIncMode()
Dstm32n6xx_hal_dma.h646 #define DMA_SINC_INCREMENTED DMA_CTR1_SINC /*!< Source incremented single / burst */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_xspi.c1530 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_INCREMENTED | DMA_DINC_FIXED)); in HAL_XSPI_Transmit_DMA()
1716 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_FIXED | DMA_DINC_INCREMENTED)); in HAL_XSPI_Receive_DMA()
Dstm32h5xx_hal_dma_ex.c3949 …nit.SrcInc = pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_SINC; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_xspi.c1557 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_INCREMENTED | DMA_DINC_FIXED)); in HAL_XSPI_Transmit_DMA()
1743 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_FIXED | DMA_DINC_INCREMENTED)); in HAL_XSPI_Receive_DMA()
Dstm32n6xx_hal_dma_ex.c3969 …nit.SrcInc = pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_SINC; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_xspi.c1550 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_INCREMENTED | DMA_DINC_FIXED)); in HAL_XSPI_Transmit_DMA()
1736 (DMA_CTR1_SINC | DMA_CTR1_DINC), (DMA_SINC_FIXED | DMA_DINC_INCREMENTED)); in HAL_XSPI_Receive_DMA()
Dstm32h7rsxx_hal_dma_ex.c3909 …nit.SrcInc = pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_SINC; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_dma_ex.c3635 …nit.SrcInc = pNode->LinkRegisters[NODE_CTR1_DEFAULT_OFFSET] & DMA_CTR1_SINC; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2261 #define DMA_CTR1_SINC DMA_CTR1_SINC_Msk /*!< Source inc… macro
Dstm32wba52xx.h2846 #define DMA_CTR1_SINC DMA_CTR1_SINC_Msk /*!< Source inc… macro
Dstm32wba54xx.h3029 #define DMA_CTR1_SINC DMA_CTR1_SINC_Msk /*!< Source inc… macro
Dstm32wba5mxx.h3029 #define DMA_CTR1_SINC DMA_CTR1_SINC_Msk /*!< Source inc… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3867 #define DMA_CTR1_SINC DMA_CTR1_SINC_Msk /*!< Source inc… macro

123