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Searched refs:DMA_CTR1_SDW_LOG2_1 (Results 1 – 25 of 41) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_dma.h378 #define DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source data width : Word */
Dstm32wbaxx_ll_dma.h638 #define LL_DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source Data Width : Word */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_dma.h442 #define DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source data width : Word */
Dstm32h7rsxx_ll_dma.h786 #define LL_DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source Data Width : Word */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_dma.h473 #define DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source data width : Word */
Dstm32u5xx_ll_dma.h785 #define LL_DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source Data Width : Word */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_dma.h718 #define DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source data width : Word */
Dstm32h5xx_ll_dma.h766 #define LL_DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source Data Width : Word */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_hal_dma.h667 #define DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source data width : Word */
Dstm32n6xx_ll_dma.h810 #define LL_DMA_SRC_DATAWIDTH_WORD DMA_CTR1_SDW_LOG2_1 /*!< Source Data Width : Word */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2258 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32wba52xx.h2843 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32wba54xx.h3026 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32wba5mxx.h3026 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32wba55xx.h3026 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3864 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32h523xx.h5220 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32h562xx.h5663 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32h533xx.h5629 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6311 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32u535xx.h5911 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32u575xx.h6310 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5018 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32h7s7xx.h5542 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro
Dstm32h7s3xx.h5463 #define DMA_CTR1_SDW_LOG2_1 (0x2UL << DMA_CTR1_SDW_LOG2_Pos) /*!< Bit 1 */ macro

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