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Searched refs:DMA_CTR1_DBL_1 (Results 1 – 25 of 46) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h1441 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
1442 (((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1)); in LL_DMA_ConfigBurstLength()
1828 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DBL_1, in LL_DMA_SetDestBurstLength()
1829 ((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1); in LL_DMA_SetDestBurstLength()
1851 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U); in LL_DMA_GetDestBurstLength()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h2080 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
2081 (((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1)); in LL_DMA_ConfigBurstLength()
2467 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DBL_1, in LL_DMA_SetDestBurstLength()
2468 ((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1); in LL_DMA_SetDestBurstLength()
2490 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U); in LL_DMA_GetDestBurstLength()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h2005 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
2006 (((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1)); in LL_DMA_ConfigBurstLength()
2525 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DBL_1, in LL_DMA_SetDestBurstLength()
2526 ((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1); in LL_DMA_SetDestBurstLength()
2557 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U); in LL_DMA_GetDestBurstLength()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h1972 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
1973 (((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1)); in LL_DMA_ConfigBurstLength()
2323 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DBL_1, in LL_DMA_SetDestBurstLength()
2324 ((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1); in LL_DMA_SetDestBurstLength()
2354 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U); in LL_DMA_GetDestBurstLength()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h2394 …(DMA_CTR1_SBL_1 | DMA_CTR1_DBL_1), (((SrcBurstLength - 1U) << DMA_CTR1_SBL_1_Pos) & DMA_CTR1_SBL_1… in LL_DMA_ConfigBurstLength()
2395 (((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1)); in LL_DMA_ConfigBurstLength()
3139 …REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CTR1, DMA_CTR1_DBL_1, in LL_DMA_SetDestBurstLength()
3140 ((DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1); in LL_DMA_SetDestBurstLength()
3170 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U); in LL_DMA_GetDestBurstLength()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal_dma.c1680 (((hdma->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_Init()
Dstm32h7rsxx_hal_dma_ex.c3710 (((pNodeConfig->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_List_BuildNode()
3916 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal_dma.c1617 (((hdma->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_Init()
Dstm32wbaxx_hal_dma_ex.c3549 (((pNodeConfig->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_List_BuildNode()
3642 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal_dma.c1630 (((hdma->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_Init()
Dstm32h5xx_hal_dma_ex.c3739 (((pNodeConfig->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_List_BuildNode()
3956 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_hal_dma.c1738 (((hdma->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_Init()
Dstm32n6xx_hal_dma_ex.c3759 (((pNodeConfig->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_List_BuildNode()
3976 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_dma.c1619 (((hdma->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_Init()
Dstm32u5xx_hal_dma_ex.c3740 (((pNodeConfig->Init.DestBurstLength - 1U) << DMA_CTR1_DBL_1_Pos) & DMA_CTR1_DBL_1) | in DMA_List_BuildNode()
3955 DMA_CTR1_DBL_1) >> DMA_CTR1_DBL_1_Pos) + 1U; in DMA_List_GetNodeConfig()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2289 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
Dstm32wba52xx.h2874 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
Dstm32wba54xx.h3057 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
Dstm32wba5mxx.h3057 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
Dstm32wba55xx.h3057 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3892 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
Dstm32h523xx.h5251 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
Dstm32h562xx.h5694 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6342 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5046 #define DMA_CTR1_DBL_1 DMA_CTR1_DBL_1_Msk /*!< Destinatio… macro

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