/hal_stm32-latest/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 2366 #define DMA_CLLR_UT2_Pos (30U) macro 2367 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32wba52xx.h | 2951 #define DMA_CLLR_UT2_Pos (30U) macro 2952 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32wba54xx.h | 3134 #define DMA_CLLR_UT2_Pos (30U) macro 3135 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32wba5mxx.h | 3134 #define DMA_CLLR_UT2_Pos (30U) macro 3135 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32wba55xx.h | 3134 #define DMA_CLLR_UT2_Pos (30U) macro 3135 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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/hal_stm32-latest/stm32cube/stm32h5xx/soc/ |
D | stm32h503xx.h | 4006 #define DMA_CLLR_UT2_Pos (30U) macro 4007 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h523xx.h | 5368 #define DMA_CLLR_UT2_Pos (30U) macro 5369 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h562xx.h | 5811 #define DMA_CLLR_UT2_Pos (30U) macro 5812 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h533xx.h | 5777 #define DMA_CLLR_UT2_Pos (30U) macro 5778 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h573xx.h | 8304 #define DMA_CLLR_UT2_Pos (30U) macro 8305 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h563xx.h | 7895 #define DMA_CLLR_UT2_Pos (30U) macro 7896 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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/hal_stm32-latest/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 6456 #define DMA_CLLR_UT2_Pos (30U) macro 6457 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u535xx.h | 6056 #define DMA_CLLR_UT2_Pos (30U) macro 6057 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u575xx.h | 6455 #define DMA_CLLR_UT2_Pos (30U) macro 6456 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u585xx.h | 6904 #define DMA_CLLR_UT2_Pos (30U) macro 6905 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u595xx.h | 6711 #define DMA_CLLR_UT2_Pos (30U) macro 6712 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u5a5xx.h | 7160 #define DMA_CLLR_UT2_Pos (30U) macro 7161 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u5f7xx.h | 7007 #define DMA_CLLR_UT2_Pos (30U) macro 7008 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u599xx.h | 6999 #define DMA_CLLR_UT2_Pos (30U) macro 7000 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u5g7xx.h | 7456 #define DMA_CLLR_UT2_Pos (30U) macro 7457 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32u5f9xx.h | 7127 #define DMA_CLLR_UT2_Pos (30U) macro 7128 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/ |
D | stm32h7r3xx.h | 5163 #define DMA_CLLR_UT2_Pos (30U) macro 5164 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h7s7xx.h | 5687 #define DMA_CLLR_UT2_Pos (30U) macro 5688 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h7s3xx.h | 5608 #define DMA_CLLR_UT2_Pos (30U) macro 5609 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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D | stm32h7r7xx.h | 5240 #define DMA_CLLR_UT2_Pos (30U) macro 5241 #define DMA_CLLR_UT2_Msk (0x1UL << DMA_CLLR_UT2_Pos) /*!< 0x40000000…
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