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Searched refs:DMA_CCR_ULEIE (Results 1 – 25 of 41) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h4130 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_EnableIT_ULE()
4284 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_DisableIT_ULE()
4441 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE) in LL_DMA_IsEnabledIT_ULE()
4442 == DMA_CCR_ULEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_ULE()
Dstm32wbaxx_hal_dma.h225 #define DMA_IT_ULE DMA_CCR_ULEIE /*!< Update linked-list item error interrupt */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h5915 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_EnableIT_ULE()
6069 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_DisableIT_ULE()
6226 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE) in LL_DMA_IsEnabledIT_ULE()
6227 == DMA_CCR_ULEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_ULE()
Dstm32h5xx_hal_dma.h225 #define DMA_IT_ULE DMA_CCR_ULEIE /*!< Update linked-list item error interrupt */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h6412 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_EnableIT_ULE()
6622 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_DisableIT_ULE()
6835 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE) in LL_DMA_IsEnabledIT_ULE()
6836 == DMA_CCR_ULEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_ULE()
Dstm32u5xx_hal_dma.h225 #define DMA_IT_ULE DMA_CCR_ULEIE /*!< Update linked-list item error interrupt */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h6111 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_EnableIT_ULE()
6321 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_DisableIT_ULE()
6534 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE) in LL_DMA_IsEnabledIT_ULE()
6535 == DMA_CCR_ULEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_ULE()
Dstm32h7rsxx_hal_dma.h225 #define DMA_IT_ULE DMA_CCR_ULEIE /*!< Update linked-list item error interrupt */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h7549 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_EnableIT_ULE()
7759 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE); in LL_DMA_DisableIT_ULE()
7972 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_ULEIE) in LL_DMA_IsEnabledIT_ULE()
7973 == DMA_CCR_ULEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_ULE()
Dstm32n6xx_hal_dma.h236 #define DMA_IT_ULE DMA_CCR_ULEIE /*!< Update linked-list item error interrupt */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2231 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32wba52xx.h2816 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32wba54xx.h2999 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32wba5mxx.h2999 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32wba55xx.h2999 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3837 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32h523xx.h5193 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32h562xx.h5636 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32h533xx.h5602 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6284 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32u535xx.h5884 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32u575xx.h6283 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h4991 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32h7s7xx.h5515 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro
Dstm32h7s3xx.h5436 #define DMA_CCR_ULEIE DMA_CCR_ULEIE_Msk /*!< Update lin… macro

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