Home
last modified time | relevance | path

Searched refs:DMA_CCR_TOIE (Results 1 – 25 of 41) sorted by relevance

12

/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h4064 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_EnableIT_TO()
4218 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_DisableIT_TO()
4372 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE) in LL_DMA_IsEnabledIT_TO()
4373 == DMA_CCR_TOIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TO()
Dstm32wbaxx_hal_dma.h228 #define DMA_IT_TO DMA_CCR_TOIE /*!< Trigger overrun interrupt */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h5849 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_EnableIT_TO()
6003 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_DisableIT_TO()
6157 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE) in LL_DMA_IsEnabledIT_TO()
6158 == DMA_CCR_TOIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TO()
Dstm32h5xx_hal_dma.h228 #define DMA_IT_TO DMA_CCR_TOIE /*!< Trigger overrun interrupt */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h6322 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_EnableIT_TO()
6532 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_DisableIT_TO()
6742 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE) in LL_DMA_IsEnabledIT_TO()
6743 == DMA_CCR_TOIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TO()
Dstm32u5xx_hal_dma.h228 #define DMA_IT_TO DMA_CCR_TOIE /*!< Trigger overrun interrupt */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h6021 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_EnableIT_TO()
6231 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_DisableIT_TO()
6441 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE) in LL_DMA_IsEnabledIT_TO()
6442 == DMA_CCR_TOIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TO()
Dstm32h7rsxx_hal_dma.h228 #define DMA_IT_TO DMA_CCR_TOIE /*!< Trigger overrun interrupt */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h7459 …T_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_EnableIT_TO()
7669 …R_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE); in LL_DMA_DisableIT_TO()
7879 …AD_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_TOIE) in LL_DMA_IsEnabledIT_TO()
7880 == DMA_CCR_TOIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_TO()
Dstm32n6xx_hal_dma.h239 #define DMA_IT_TO DMA_CCR_TOIE /*!< Trigger overrun interrupt */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2240 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32wba52xx.h2825 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32wba54xx.h3008 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32wba5mxx.h3008 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32wba55xx.h3008 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3846 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32h523xx.h5202 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32h562xx.h5645 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32h533xx.h5611 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6293 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32u535xx.h5893 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32u575xx.h6292 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h5000 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32h7s7xx.h5524 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro
Dstm32h7s3xx.h5445 #define DMA_CCR_TOIE DMA_CCR_TOIE_Msk /*!< Trigger ov… macro

12