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Searched refs:DMA_CCR_DTEIE (Results 1 – 25 of 41) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h4152 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_EnableIT_DTE()
4306 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_DisableIT_DTE()
4464 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE) in LL_DMA_IsEnabledIT_DTE()
4465 == DMA_CCR_DTEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_DTE()
Dstm32wbaxx_hal_dma.h224 #define DMA_IT_DTE DMA_CCR_DTEIE /*!< Data transfer error interrupt */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h5937 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_EnableIT_DTE()
6091 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_DisableIT_DTE()
6249 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE) in LL_DMA_IsEnabledIT_DTE()
6250 == DMA_CCR_DTEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_DTE()
Dstm32h5xx_hal_dma.h224 #define DMA_IT_DTE DMA_CCR_DTEIE /*!< Data transfer error interrupt */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h6442 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_EnableIT_DTE()
6652 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_DisableIT_DTE()
6866 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE) in LL_DMA_IsEnabledIT_DTE()
6867 == DMA_CCR_DTEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_DTE()
Dstm32u5xx_hal_dma.h224 #define DMA_IT_DTE DMA_CCR_DTEIE /*!< Data transfer error interrupt */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h6141 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_EnableIT_DTE()
6351 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_DisableIT_DTE()
6565 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE) in LL_DMA_IsEnabledIT_DTE()
6566 == DMA_CCR_DTEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_DTE()
Dstm32h7rsxx_hal_dma.h224 #define DMA_IT_DTE DMA_CCR_DTEIE /*!< Data transfer error interrupt */
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h7579 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_EnableIT_DTE()
7789 …_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE); in LL_DMA_DisableIT_DTE()
8003 …D_BIT(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CCR, DMA_CCR_DTEIE) in LL_DMA_IsEnabledIT_DTE()
8004 == DMA_CCR_DTEIE) ? 1UL : 0UL); in LL_DMA_IsEnabledIT_DTE()
Dstm32n6xx_hal_dma.h235 #define DMA_IT_DTE DMA_CCR_DTEIE /*!< Data transfer error interrupt */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2228 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32wba52xx.h2813 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32wba54xx.h2996 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32wba5mxx.h2996 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32wba55xx.h2996 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3834 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32h523xx.h5190 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32h562xx.h5633 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32h533xx.h5599 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6281 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32u535xx.h5881 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32u575xx.h6280 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h4988 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32h7s7xx.h5512 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro
Dstm32h7s3xx.h5433 #define DMA_CCR_DTEIE DMA_CCR_DTEIE_Msk /*!< Data trans… macro

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