Home
last modified time | relevance | path

Searched refs:DMA1_Channel5_BASE (Results 1 – 25 of 170) sorted by relevance

1234567

/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_dma.h55 #if defined(DMA1_Channel5_BASE)
56 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_dma.h52 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h53 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_dma.h53 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_dma.h53 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_dma.h52 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_dma.h52 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_dma.h53 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_dma.h52 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h55 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_dma.h53 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_dma.h53 (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h501 #define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x00000058UL) macro
550 #define DMA1_Channel5 ((DMA_Channel_TypeDef *)DMA1_Channel5_BASE)
Dstm32f101xb.h511 #define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x00000058UL) macro
565 #define DMA1_Channel5 ((DMA_Channel_TypeDef *)DMA1_Channel5_BASE)
Dstm32f100xb.h562 #define DMA1_Channel5_BASE (AHBPERIPH_BASE + 0x00000058UL) macro
625 #define DMA1_Channel5 ((DMA_Channel_TypeDef *)DMA1_Channel5_BASE)
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h461 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
508 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32f030x8.h472 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
524 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32f070x6.h504 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
552 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h538 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
593 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32l010x8.h499 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
551 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32l010xb.h501 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
555 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32l011xx.h517 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
567 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32l021xx.h536 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
587 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32l031xx.h519 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
573 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)
Dstm32l051xx.h547 #define DMA1_Channel5_BASE (DMA1_BASE + 0x00000058UL) macro
607 #define DMA1_Channel5 ((DMA_Channel_TypeDef *) DMA1_Channel5_BASE)

1234567