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Searched refs:DMA1_Channel2_BASE (Results 1 – 25 of 172) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_dma.h49 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_dma.h49 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_dma.h49 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_dma.h49 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h52 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_dma.h50 (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
/hal_stm32-latest/stm32cube/stm32f1xx/soc/
Dstm32f101x6.h498 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x0000001CUL) macro
547 #define DMA1_Channel2 ((DMA_Channel_TypeDef *)DMA1_Channel2_BASE)
Dstm32f101xb.h508 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x0000001CUL) macro
562 #define DMA1_Channel2 ((DMA_Channel_TypeDef *)DMA1_Channel2_BASE)
Dstm32f100xb.h559 #define DMA1_Channel2_BASE (AHBPERIPH_BASE + 0x0000001CUL) macro
622 #define DMA1_Channel2 ((DMA_Channel_TypeDef *)DMA1_Channel2_BASE)
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h458 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
505 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32f030x8.h469 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
521 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32f070x6.h501 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
549 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h535 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
590 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32l010x8.h496 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
548 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32l010xb.h498 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
552 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32l011xx.h514 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
564 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32l021xx.h533 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
584 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32l031xx.h516 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
570 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)
Dstm32l051xx.h544 #define DMA1_Channel2_BASE (DMA1_BASE + 0x0000001CUL) macro
604 #define DMA1_Channel2 ((DMA_Channel_TypeDef *) DMA1_Channel2_BASE)

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