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Searched refs:CSELR (Results 1 – 25 of 45) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_dma.c258 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
261 DMA1_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
266 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
269 DMA2_CSELR->CSELR |= (uint32_t)(hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
336 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()
341 DMA2_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_dma.c191 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
194 DMA1_CSELR->CSELR |= (uint32_t) (hdma->Init.Request << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_Init()
243 DMA1_CSELR->CSELR &= ~(DMA_CSELR_C1S << (hdma->ChannelIndex & 0x1cU)); in HAL_DMA_DeInit()
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_dma_ex.h778 DMA1->CSELR &= ~(0x0FU << (uint32_t)(((__REQUEST__) >> 28U) * 4U)); \
779 … DMA1->CSELR |= (uint32_t)((__REQUEST__) & 0x0FFFFFFFU); \
785 DMA2->CSELR &= ~(0x0FU << (uint32_t)(((__REQUEST__) >> 28U) * 4U)); \
786 … DMA2->CSELR |= (uint32_t)((__REQUEST__) & 0x0FFFFFFFU); \
Dstm32f0xx_ll_dma.h1285 MODIFY_REG(DMAx->CSELR, in LL_DMA_SetPeriphRequest()
1327 return (READ_BIT(DMAx->CSELR, in LL_DMA_GetPeriphRequest()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_dma.h1209 MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_SetPeriphRequest()
1251 return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_GetPeriphRequest()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_dma.h1514 MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_SetPeriphRequest()
1548 return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, in LL_DMA_GetPeriphRequest()
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h224 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l010x8.h189 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l010xb.h190 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l011xx.h204 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l021xx.h223 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l031xx.h205 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l051xx.h209 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l010x4.h189 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l010x6.h189 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l081xx.h232 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l071xx.h213 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l052xx.h240 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l062xx.h259 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l053xx.h241 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l072xx.h249 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l073xx.h250 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l083xx.h269 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
Dstm32l063xx.h260 …__IO uint32_t CSELR; /*!< DMA channel selection register, Address offset: 0xA8… member
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030xc.h188 …__IO uint32_t CSELR; /*!< Channel selection register, Address… member

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