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Searched refs:CRS_CR_ESYNCIE (Results 1 – 25 of 151) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_crs.h88 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
738 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
748 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
758 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_crs.h88 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
738 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
748 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
758 return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32l0xx_hal_rcc_ex.h537 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_crs.h73 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
723 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
733 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
743 return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32f0xx_hal_rcc_ex.h895 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_crs.h87 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
739 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
749 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
759 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32h5xx_hal_rcc_ex.h1346 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_crs.h87 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
739 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
749 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
759 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32u5xx_hal_rcc_ex.h1056 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_crs.h100 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
751 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
761 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
771 return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32c0xx_hal_rcc_ex.h328 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_crs.h73 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
723 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
733 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
743 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32g0xx_hal_rcc_ex.h580 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_crs.h73 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
729 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
739 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
749 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32h7rsxx_hal_rcc_ex.h708 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_crs.h73 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
728 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
738 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
748 return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32l4xx_hal_rcc_ex.h841 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_crs.h73 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
723 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
733 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
743 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32l5xx_hal_rcc_ex.h652 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_crs.h73 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
723 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
733 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
743 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32h7xx_hal_rcc_ex.h1731 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_crs.h88 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
740 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
750 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
760 return (READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32u0xx_hal_rcc_ex.h478 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_crs.h73 #define LL_CRS_CR_ESYNCIE CRS_CR_ESYNCIE
723 SET_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_EnableIT_ESYNC()
733 CLEAR_BIT(CRS->CR, CRS_CR_ESYNCIE); in LL_CRS_DisableIT_ESYNC()
743 return ((READ_BIT(CRS->CR, CRS_CR_ESYNCIE) == (CRS_CR_ESYNCIE)) ? 1UL : 0UL); in LL_CRS_IsEnabledIT_ESYNC()
Dstm32g4xx_hal_rcc_ex.h544 #define RCC_CRS_IT_ESYNC CRS_CR_ESYNCIE /*!< Expected SYNC */

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