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Searched refs:CRS (Results 1 – 25 of 171) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_crs.h34 #if defined(CRS)
237 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
247 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
257 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
267 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
277 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
287 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
300 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
310 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
323 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
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Dstm32wbxx_hal_rcc_ex.h234 #if defined(CRS)
360 #if defined(CRS)
672 #if defined(CRS)
1419 #if defined(CRS)
1430 #define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__))
1442 #define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__))
1453 #define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__) ((READ_BIT(CRS->CR, (__INTERRUPT__)) != RESET) …
1469 … WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__INTERRUPT__) & ~RCC_CRS_IT_ERROR_MASK)); \
1473 WRITE_REG(CRS->ICR, (__INTERRUPT__)); \
1490 #define __HAL_RCC_CRS_GET_FLAG(__FLAG__) (READ_BIT(CRS->ISR, (__FLAG__)) == (__FLAG__))
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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_ll_crs.h34 #if defined(CRS)
237 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
247 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
257 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
267 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
277 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
287 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
300 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
310 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
323 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_crs.h34 #if defined(CRS)
222 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
232 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
242 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
252 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
262 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
272 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
285 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
295 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
308 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
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Dstm32f0xx_hal_rcc_ex.h223 #if defined(CRS)
354 #if defined(CRS)
549 #if defined(CRS)
802 #if defined(CRS)
1197 #if defined(CRS)
1439 #if defined(CRS)
1652 #if defined(CRS)
1863 #if defined(CRS)
1880 #define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__))
1892 #define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__))
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_crs.h34 #if defined(CRS)
236 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
246 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
256 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
266 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
276 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
286 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
299 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
309 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
322 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_crs.h34 #if defined(CRS)
236 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
246 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
256 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
266 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
276 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
286 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
299 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
309 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
322 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_crs.h51 #if defined(CRS)
249 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
259 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
269 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
279 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
289 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
299 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
312 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
322 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
335 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
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Dstm32c0xx_hal_rcc_ex.h76 #if defined (CRS)
234 #if defined(CRS)
494 #if defined(CRS)
506 #define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__))
518 #define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__))
529 #define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__) ((READ_BIT(CRS->CR, (__INTERRUPT__)) != 0U) ? S…
548 WRITE_REG(CRS->ICR, CRS_ICR_ERRC | \
553 WRITE_REG(CRS->ICR, (__INTERRUPT__)); \
570 #define __HAL_RCC_CRS_GET_FLAG(__FLAG__) (READ_BIT(CRS->ISR, (__FLAG__)) == (__FLAG__))
594 WRITE_REG(CRS->ICR, CRS_ICR_ERRC | \
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/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_crs.h34 #if defined(CRS)
222 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
232 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
242 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
252 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
262 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
272 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
285 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
295 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
308 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
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Dstm32g0xx_hal_rcc_ex.h125 #if defined(CRS)
488 #if defined(CRS)
1023 #if defined(CRS)
1035 #define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__))
1047 #define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__))
1058 #define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__) ((READ_BIT(CRS->CR, (__INTERRUPT__)) != 0U) ? S…
1077 … WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__INTERRUPT__) & ~RCC_CRS_IT_ERROR_MASK)); \
1081 WRITE_REG(CRS->ICR, (__INTERRUPT__)); \
1098 #define __HAL_RCC_CRS_GET_FLAG(__FLAG__) (READ_BIT(CRS->ISR, (__FLAG__)) == (__FLAG__))
1121 … WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__FLAG__) & ~RCC_CRS_FLAG_ERROR_MASK)); \
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_crs.h34 #if defined(CRS)
223 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
233 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
243 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
253 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
263 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
273 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
286 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
296 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
309 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_crs.h34 #if defined(CRS)
227 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
237 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
247 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
257 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
267 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
277 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
290 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
300 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
313 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_crs.h34 #if defined(CRS)
222 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
232 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
242 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
252 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
262 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
272 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
285 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
295 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
308 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
Dstm32l5xx_hal_rcc_ex.h185 #if defined(CRS)
560 #if defined(CRS)
1719 #if defined(CRS)
1735 #define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__))
1747 #define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__))
1758 #define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__) ((READ_BIT(CRS->CR, (__INTERRUPT__)) != 0U) ? 1…
1778 … WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__INTERRUPT__) & ~RCC_CRS_IT_ERROR_MASK)); \
1782 WRITE_REG(CRS->ICR, (__INTERRUPT__)); \
1799 #define __HAL_RCC_CRS_GET_FLAG(__FLAG__) (READ_BIT(CRS->ISR, (__FLAG__)) == (__FLAG__))
1823 … WRITE_REG(CRS->ICR, CRS_ICR_ERRC | ((__FLAG__) & ~RCC_CRS_FLAG_ERROR_MASK)); \
[all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_crs.h34 #if defined(CRS)
222 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
232 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
242 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
252 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
262 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
272 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
285 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
295 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
308 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
Dstm32u0xx_ll_crs.h35 #if defined(CRS)
237 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
247 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
257 return (READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)); in LL_CRS_IsEnabledFreqErrorCounter()
267 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
277 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
287 return (READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)); in LL_CRS_IsEnabledAutoTrimming()
300 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_POSITION_TRIM); in LL_CRS_SetHSI48SmoothTrimming()
310 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_POSITION_TRIM); in LL_CRS_GetHSI48SmoothTrimming()
323 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
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Dstm32u0xx_hal_rcc_ex.h110 #if defined (CRS)
384 #if defined(CRS)
909 #if defined(CRS)
921 #define __HAL_RCC_CRS_ENABLE_IT(__INTERRUPT__) SET_BIT(CRS->CR, (__INTERRUPT__))
933 #define __HAL_RCC_CRS_DISABLE_IT(__INTERRUPT__) CLEAR_BIT(CRS->CR, (__INTERRUPT__))
944 #define __HAL_RCC_CRS_GET_IT_SOURCE(__INTERRUPT__) ((READ_BIT(CRS->CR, (__INTERRUPT__)) != 0U) ? S…
963 WRITE_REG(CRS->ICR, CRS_ICR_ERRC | \
968 WRITE_REG(CRS->ICR, (__INTERRUPT__)); \
985 #define __HAL_RCC_CRS_GET_FLAG(__FLAG__) (READ_BIT(CRS->ISR, (__FLAG__)) == (__FLAG__))
1009 WRITE_REG(CRS->ICR, CRS_ICR_ERRC | \
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_crs.h34 #if defined(CRS)
221 SET_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_EnableFreqErrorCounter()
231 CLEAR_BIT(CRS->CR, CRS_CR_CEN); in LL_CRS_DisableFreqErrorCounter()
241 return ((READ_BIT(CRS->CR, CRS_CR_CEN) == (CRS_CR_CEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledFreqErrorCounter()
251 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_EnableAutoTrimming()
261 CLEAR_BIT(CRS->CR, CRS_CR_AUTOTRIMEN); in LL_CRS_DisableAutoTrimming()
271 return ((READ_BIT(CRS->CR, CRS_CR_AUTOTRIMEN) == (CRS_CR_AUTOTRIMEN)) ? 1UL : 0UL); in LL_CRS_IsEnabledAutoTrimming()
284 MODIFY_REG(CRS->CR, CRS_CR_TRIM, Value << CRS_CR_TRIM_Pos); in LL_CRS_SetHSI48SmoothTrimming()
294 return (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in LL_CRS_GetHSI48SmoothTrimming()
307 MODIFY_REG(CRS->CFGR, CRS_CFGR_RELOAD, Value); in LL_CRS_SetReloadCounter()
[all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/src/
Dstm32f0xx_hal_rcc_ex.c39 #if defined(CRS)
586 #if defined(CRS)
683 WRITE_REG(CRS->CFGR, value); in HAL_RCCEx_CRSConfig()
687 MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_BITNUMBER)); in HAL_RCCEx_CRSConfig()
692 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); in HAL_RCCEx_CRSConfig()
701 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in HAL_RCCEx_CRSSoftwareSynchronizationGenerate()
715 pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in HAL_RCCEx_CRSGetSynchronizationInfo()
718 …pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_BIT… in HAL_RCCEx_CRSGetSynchronizationInfo()
721 …pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_BIT… in HAL_RCCEx_CRSGetSynchronizationInfo()
724 pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in HAL_RCCEx_CRSGetSynchronizationInfo()
[all …]
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/src/
Dstm32c0xx_hal_rcc_ex.c509 #if defined(CRS)
606 WRITE_REG(CRS->CFGR, value); in HAL_RCCEx_CRSConfig()
610 MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos)); in HAL_RCCEx_CRSConfig()
615 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); in HAL_RCCEx_CRSConfig()
624 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in HAL_RCCEx_CRSSoftwareSynchronizationGenerate()
638 pSynchroInfo->ReloadValue = (READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in HAL_RCCEx_CRSGetSynchronizationInfo()
641 pSynchroInfo->HSI48CalibrationValue = (READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
644 pSynchroInfo->FreqErrorCapture = (READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
647 pSynchroInfo->FreqErrorDirection = (READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in HAL_RCCEx_CRSGetSynchronizationInfo()
752 uint32_t itflags = READ_REG(CRS->ISR); in HAL_RCCEx_CRS_IRQHandler()
[all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/src/
Dstm32l0xx_hal_rcc_ex.c848 #if defined (CRS)
945 WRITE_REG(CRS->CFGR, value); in HAL_RCCEx_CRSConfig()
949 MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos)); in HAL_RCCEx_CRSConfig()
954 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); in HAL_RCCEx_CRSConfig()
963 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in HAL_RCCEx_CRSSoftwareSynchronizationGenerate()
977 pSynchroInfo->ReloadValue = (uint32_t)(READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in HAL_RCCEx_CRSGetSynchronizationInfo()
980 …pSynchroInfo->HSI48CalibrationValue = (uint32_t)(READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos… in HAL_RCCEx_CRSGetSynchronizationInfo()
983 …pSynchroInfo->FreqErrorCapture = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos… in HAL_RCCEx_CRSGetSynchronizationInfo()
986 pSynchroInfo->FreqErrorDirection = (uint32_t)(READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in HAL_RCCEx_CRSGetSynchronizationInfo()
1091 uint32_t itflags = READ_REG(CRS->ISR); in HAL_RCCEx_CRS_IRQHandler()
[all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/src/
Dstm32u0xx_hal_rcc_ex.c1449 #if defined(CRS)
1546 WRITE_REG(CRS->CFGR, value); in HAL_RCCEx_CRSConfig()
1550 MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos)); in HAL_RCCEx_CRSConfig()
1555 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); in HAL_RCCEx_CRSConfig()
1564 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in HAL_RCCEx_CRSSoftwareSynchronizationGenerate()
1578 pSynchroInfo->ReloadValue = (READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in HAL_RCCEx_CRSGetSynchronizationInfo()
1581 pSynchroInfo->HSI48CalibrationValue = (READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
1584 pSynchroInfo->FreqErrorCapture = (READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
1587 pSynchroInfo->FreqErrorDirection = (READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in HAL_RCCEx_CRSGetSynchronizationInfo()
1692 uint32_t itflags = READ_REG(CRS->ISR); in HAL_RCCEx_CRS_IRQHandler()
[all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/src/
Dstm32g0xx_hal_rcc_ex.c1299 #if defined(CRS)
1396 WRITE_REG(CRS->CFGR, value); in HAL_RCCEx_CRSConfig()
1400 MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos)); in HAL_RCCEx_CRSConfig()
1405 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); in HAL_RCCEx_CRSConfig()
1414 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in HAL_RCCEx_CRSSoftwareSynchronizationGenerate()
1428 pSynchroInfo->ReloadValue = (READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in HAL_RCCEx_CRSGetSynchronizationInfo()
1431 pSynchroInfo->HSI48CalibrationValue = (READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
1434 pSynchroInfo->FreqErrorCapture = (READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
1437 pSynchroInfo->FreqErrorDirection = (READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in HAL_RCCEx_CRSGetSynchronizationInfo()
1542 uint32_t itflags = READ_REG(CRS->ISR); in HAL_RCCEx_CRS_IRQHandler()
[all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_rcc_ex.c1490 #if defined(CRS)
1587 WRITE_REG(CRS->CFGR, value); in HAL_RCCEx_CRSConfig()
1591 MODIFY_REG(CRS->CR, CRS_CR_TRIM, (pInit->HSI48CalibrationValue << CRS_CR_TRIM_Pos)); in HAL_RCCEx_CRSConfig()
1596 SET_BIT(CRS->CR, CRS_CR_AUTOTRIMEN | CRS_CR_CEN); in HAL_RCCEx_CRSConfig()
1605 SET_BIT(CRS->CR, CRS_CR_SWSYNC); in HAL_RCCEx_CRSSoftwareSynchronizationGenerate()
1619 pSynchroInfo->ReloadValue = (READ_BIT(CRS->CFGR, CRS_CFGR_RELOAD)); in HAL_RCCEx_CRSGetSynchronizationInfo()
1622 pSynchroInfo->HSI48CalibrationValue = (READ_BIT(CRS->CR, CRS_CR_TRIM) >> CRS_CR_TRIM_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
1625 pSynchroInfo->FreqErrorCapture = (READ_BIT(CRS->ISR, CRS_ISR_FECAP) >> CRS_ISR_FECAP_Pos); in HAL_RCCEx_CRSGetSynchronizationInfo()
1628 pSynchroInfo->FreqErrorDirection = (READ_BIT(CRS->ISR, CRS_ISR_FEDIR)); in HAL_RCCEx_CRSGetSynchronizationInfo()
1733 uint32_t itflags = READ_REG(CRS->ISR); in HAL_RCCEx_CRS_IRQHandler()
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