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Searched refs:CR5 (Results 1 – 25 of 60) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wb0x/drivers/src/
Dstm32wb0x_hal_pwr_ex.c425 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSLVL, OutputVoltage); in HAL_PWREx_ConfigSMPS()
426 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSBOMSEL, BOM); in HAL_PWREx_ConfigSMPS()
447 MODIFY_REG(PWR->CR5, PWR_CR5_NOSMPS, PWR_SMPS_ON); in HAL_PWREx_SMPS_SetMode()
449 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSFBYP, PWR_NO_SMPS_PRECHARGE); in HAL_PWREx_SMPS_SetMode()
455 MODIFY_REG(PWR->CR5, PWR_CR5_NOSMPS, PWR_SMPS_ON); in HAL_PWREx_SMPS_SetMode()
457 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSFBYP, PWR_SMPS_PRECHARGE); in HAL_PWREx_SMPS_SetMode()
463 MODIFY_REG(PWR->CR5, PWR_CR5_NOSMPS, PWR_SMPS_OFF); in HAL_PWREx_SMPS_SetMode()
465 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSFBYP, PWR_NO_SMPS_PRECHARGE); in HAL_PWREx_SMPS_SetMode()
Dstm32wb0x_ll_pwr.c96 LL_PWR_WriteReg(CR5, PWR_CR5_RESET_VALUE); in LL_PWR_DeInit()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_pwr.h1295 MODIFY_REG(PWR->CR5, PWR_CR5_BORHC, BORConfiguration); in LL_PWR_SetBORConfig()
1307 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_BORHC)); in LL_PWR_GetBORConfig()
1351 …MODIFY_REG(PWR->CR5, PWR_CR5_SMPSEN, (OperatingMode & PWR_SR2_SMPSF) << (PWR_CR5_SMPSEN_Pos - PWR_… in LL_PWR_SMPS_SetMode()
1372 …uint32_t OperatingMode = (READ_BIT(PWR->CR5, PWR_CR5_SMPSEN) >> (PWR_CR5_SMPSEN_Pos - PWR_SR2_SMPS… in LL_PWR_SMPS_GetMode()
1416 SET_BIT(PWR->CR5, PWR_CR5_SMPSEN); in LL_PWR_SMPS_Enable()
1429 CLEAR_BIT(PWR->CR5, PWR_CR5_SMPSEN); in LL_PWR_SMPS_Disable()
1439 return ((READ_BIT(PWR->CR5, PWR_CR5_SMPSEN) == (PWR_CR5_SMPSEN)) ? 1UL : 0UL); in LL_PWR_SMPS_IsEnabled()
1458 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSSC, StartupCurrent); in LL_PWR_SMPS_SetStartupCurrent()
1476 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_SMPSSC)); in LL_PWR_SMPS_GetStartupCurrent()
1514 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSVOS, OutputVoltageLevel); in LL_PWR_SMPS_SetOutputVoltageLevel()
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/drivers/include/
Dstm32wb0x_ll_pwr.h2337 MODIFY_REG(PWR->CR5, PWR_CR5_NOSMPS, mode); in LL_PWR_SetSMPSMode()
2349 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_NOSMPS)); in LL_PWR_GetSMPSMode()
2362 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSFBYP, mode); in LL_PWR_SetSMPSPrechargeMode()
2372 return ((READ_BIT(PWR->CR5, PWR_CR5_SMPSFBYP) == (PWR_CR5_SMPSFBYP)) ? 1UL : 0UL); in LL_PWR_IsEnabledSMPSPrechargeMode()
2385 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSLPOPEN, mode); in LL_PWR_SetSMPSOpenMode()
2400 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSBOMSEL, BOM); in LL_PWR_SetSMPSBOM()
2414 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_SMPSBOMSEL)); in LL_PWR_GetSMPSBOM()
2441 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSLVL, OutputVoltageLevel); in LL_PWR_SMPS_SetOutputVoltageLevel()
2468 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_SMPSLVL)); in LL_PWR_SMPS_GetOutputVoltageLevel()
3148 MODIFY_REG(PWR->CR5, PWR_CR5_SMPS_PRECH_CUR_SEL, mode); in LL_PWR_SetSMPSPrechargeLimitCurrent()
[all …]
/hal_stm32-latest/stm32cube/stm32wb0x/soc/
Dsystem_stm32wb0x.c245 …MODIFY_REG(PWR->CR5, PWR_CR5_SMPSBOMSEL, (CFG_HW_SMPS_BOM<<PWR_CR5_SMPSBOMSEL_Pos)); // Configure … in SystemInit()
249 …MODIFY_REG(PWR->CR5, PWR_CR5_NOSMPS, (CFG_HW_SMPS<<PWR_CR5_NOSMPS_Pos)); // SMPS ON/OFF Configurat… in SystemInit()
253 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSFBYP, (1<<PWR_CR5_SMPSFBYP_Pos)); // SMPS BYPASS Configuration in SystemInit()
255 …MODIFY_REG(PWR->CR5, PWR_CR5_SMPSLPOPEN, (CFG_HW_SMPS_LOW_POWER<<PWR_CR5_SMPSLPOPEN_Pos)); // SMPS… in SystemInit()
Dstm32wb05.h374 …__IO uint32_t CR5; /*!< (@ 0x0000001C) Power control register 5 … member
Dstm32wb07.h379 …__IO uint32_t CR5; /*!< (@ 0x0000001C) Power control register 5 … member
Dstm32wb09.h368 __IO uint32_t CR5; /*!< (@ 0x0000001C) CR5 register */ member
Dstm32wb06.h379 …__IO uint32_t CR5; /*!< (@ 0x0000001C) Power control register 5 … member
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_pwr.h625 MODIFY_REG(PWR->CR5, PWR_CR5_RFEOLEN, RadioEOL); in LL_PWR_SetRadioEOL()
637 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_RFEOLEN)); in LL_PWR_GetRadioEOL()
1186 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSEN, OperatingMode); in LL_PWR_SMPS_SetMode()
1198 return (uint32_t)(READ_BIT(PWR->CR5, PWR_CR5_SMPSEN)); in LL_PWR_SMPS_GetMode()
1230 SET_BIT(PWR->CR5, PWR_CR5_SMPSEN); in LL_PWR_SMPS_Enable()
1243 CLEAR_BIT(PWR->CR5, PWR_CR5_SMPSEN); in LL_PWR_SMPS_Disable()
1253 return ((READ_BIT(PWR->CR5, PWR_CR5_SMPSEN) == (PWR_CR5_SMPSEN)) ? 1UL : 0UL); in LL_PWR_SMPS_IsEnabled()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/src/
Dstm32g4xx_hal_pwr_ex.c115 else if (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == PWR_CR5_R1MODE) in HAL_PWREx_GetVoltageRange()
165 CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
185 CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
194 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
214 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_pwr_ex.c121 else if (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == PWR_CR5_R1MODE) in HAL_PWREx_GetVoltageRange()
176 CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
196 CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
205 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
225 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in HAL_PWREx_ControlVoltageScaling()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/src/
Dstm32wbxx_hal_pwr_ex.c878 … MODIFY_REG(PWR->CR5, PWR_CR5_SMPSVOS, (sConfigSMPS->StartupCurrent | sConfigSMPS->OutputVoltage)); in HAL_PWREx_ConfigSMPS()
903 MODIFY_REG(PWR->CR5, (PWR_CR5_SMPSSC | PWR_CR5_SMPSVOS), in HAL_PWREx_ConfigSMPS()
923 …MODIFY_REG(PWR->CR5, PWR_CR5_SMPSEN, (OperatingMode & PWR_SR2_SMPSF) << (PWR_CR5_SMPSEN_Pos - PWR_… in HAL_PWREx_SMPS_SetMode()
Dstm32wbxx_ll_pwr.c90 LL_PWR_WriteReg(CR5, PWR_CR5_RESET_VALUE); in LL_PWR_DeInit()
Dstm32wbxx_hal_pwr.c109 LL_PWR_WriteReg(CR5, PWR_CR5_RESET_VALUE); in HAL_PWR_DeInit()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_pwr.h368 CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); in LL_PWR_EnableRange1BoostMode()
378 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in LL_PWR_DisableRange1BoostMode()
388 return ((READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == 0x0U) ? 1UL : 0UL); in LL_PWR_IsEnabledRange1BoostMode()
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_pwr.h343 CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); in LL_PWR_EnableRange1BoostMode()
353 SET_BIT(PWR->CR5, PWR_CR5_R1MODE); in LL_PWR_DisableRange1BoostMode()
364 temp = READ_BIT(PWR->CR5, PWR_CR5_R1MODE); in LL_PWR_IsEnabledRange1BoostMode()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/src/
Dstm32wlxx_hal_pwr_ex.c810 MODIFY_REG(PWR->CR5, PWR_CR5_RFEOLEN, RadioEOL); in HAL_PWREx_SetRadioEOL()
825 MODIFY_REG(PWR->CR5, PWR_CR5_SMPSEN, OperatingMode); in HAL_PWREx_SMPS_SetMode()
Dstm32wlxx_ll_pwr.c88 LL_PWR_WriteReg(CR5, PWR_CR5_RESET_VALUE); in LL_PWR_DeInit()
Dstm32wlxx_hal_pwr.c99 LL_PWR_WriteReg(CR5, PWR_CR5_RESET_VALUE); in HAL_PWR_DeInit()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal_pwr_ex.c1984 CLEAR_BIT(PWR->CR5, (dummy << PWR_CR5_SRAM6PDS1_Pos)); in HAL_PWREx_EnableRAMsContentStopRetention()
2234 SET_BIT(PWR->CR5, (dummy << PWR_CR5_SRAM6PDS1_Pos)); in HAL_PWREx_DisableRAMsContentStopRetention()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_pwr.h1271 …MODIFY_REG(PWR->CR5, LL_PWR_SRAM6_STOP_FULL_RETENTION, ((~SRAM6PageRetention) & LL_PWR_SRAM6_STOP_… in LL_PWR_SetSRAM6StopRetention()
1299 …return ((~(READ_BIT(PWR->CR5, LL_PWR_SRAM6_STOP_FULL_RETENTION))) & LL_PWR_SRAM6_STOP_FULL_RETENTI… in LL_PWR_GetSRAM6StopRetention()
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h500 …__IO uint32_t CR5; /*!< PWR Power Control Register 5, Address offset:… member
Dstm32wle5xx.h500 …__IO uint32_t CR5; /*!< PWR Power Control Register 5, Address offset:… member
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h370 …__IO uint32_t CR5; /*!< PWR Power Control Register 5, Address offset:… member

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