Searched refs:COMP5_CSR_COMP5BLANKING_Pos (Results 1 – 4 of 4) sorted by relevance
2553 #define COMP5_CSR_COMP5BLANKING_Pos (18U) macro2554 #define COMP5_CSR_COMP5BLANKING_Msk (0x3UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x000C0000 */2556 #define COMP5_CSR_COMP5BLANKING_0 (0x1UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00040000 */2557 #define COMP5_CSR_COMP5BLANKING_1 (0x2UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00080000 */2558 #define COMP5_CSR_COMP5BLANKING_2 (0x4UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00100000 */
2595 #define COMP5_CSR_COMP5BLANKING_Pos (18U) macro2596 #define COMP5_CSR_COMP5BLANKING_Msk (0x3UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x000C0000 */2598 #define COMP5_CSR_COMP5BLANKING_0 (0x1UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00040000 */2599 #define COMP5_CSR_COMP5BLANKING_1 (0x2UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00080000 */2600 #define COMP5_CSR_COMP5BLANKING_2 (0x4UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00100000 */
2638 #define COMP5_CSR_COMP5BLANKING_Pos (18U) macro2639 #define COMP5_CSR_COMP5BLANKING_Msk (0x3UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x000C0000 */2641 #define COMP5_CSR_COMP5BLANKING_0 (0x1UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00040000 */2642 #define COMP5_CSR_COMP5BLANKING_1 (0x2UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00080000 */2643 #define COMP5_CSR_COMP5BLANKING_2 (0x4UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00100000 */
2594 #define COMP5_CSR_COMP5BLANKING_Pos (18U) macro2595 #define COMP5_CSR_COMP5BLANKING_Msk (0x3UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x000C0000 */2597 #define COMP5_CSR_COMP5BLANKING_0 (0x1UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00040000 */2598 #define COMP5_CSR_COMP5BLANKING_1 (0x2UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00080000 */2599 #define COMP5_CSR_COMP5BLANKING_2 (0x4UL << COMP5_CSR_COMP5BLANKING_Pos) /*!< 0x00100000 */
