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Searched refs:CFCR (Results 1 – 25 of 51) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_dma.h3673 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TO()
3695 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_SUSP()
3717 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_USE()
3739 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_ULE()
3761 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_DTE()
3783 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_HT()
3805 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TC()
Dstm32wbaxx_hal_dma.h534 ((__HANDLE__)->Instance->CFCR = (__FLAG__))
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_dma.h5458 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TO()
5480 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_SUSP()
5502 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_USE()
5524 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_ULE()
5546 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_DTE()
5568 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_HT()
5590 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TC()
Dstm32h5xx_hal_dma.h877 ((__HANDLE__)->Instance->CFCR = (__FLAG__))
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_dma.h5795 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TO()
5825 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_SUSP()
5855 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_USE()
5885 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_ULE()
5915 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_DTE()
5945 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_HT()
5975 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TC()
Dstm32u5xx_hal_dma.h631 ((__HANDLE__)->Instance->CFCR = (__FLAG__))
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_dma.h5525 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TO()
5555 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_SUSP()
5585 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_USE()
5615 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_ULE()
5645 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_DTE()
5675 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_HT()
5705 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TC()
Dstm32h7rsxx_hal_dma.h593 ((__HANDLE__)->Instance->CFCR = (__FLAG__))
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_dma.h6932 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TO()
6962 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_SUSP()
6992 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_USE()
7022 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_ULE()
7052 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_DTE()
7082 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_HT()
7112 …WRITE_REG(((DMA_Channel_TypeDef *)(dma_base_addr + LL_DMA_CH_OFFSET_TAB[Channel]))->CFCR, DMA_CFCR… in LL_DMA_ClearFlag_TC()
Dstm32n6xx_hal_dma.h854 ((__HANDLE__)->Instance->CFCR = (__FLAG__))
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_ll_dma.c295 LL_DMA_WriteReg(tmp, CFCR, 0x00003F00U); in LL_DMA_DeInit()
Dstm32wbaxx_hal_dma_ex.c3414 hdma->Instance->CFCR |= DMA_CFCR_SUSPF; in HAL_DMAEx_Resume()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_ll_dma.c353 LL_DMA_WriteReg(tmp, CFCR, 0x00003F00U); in LL_DMA_DeInit()
Dstm32u5xx_hal_dma_ex.c3594 hdma->Instance->CFCR |= DMA_CFCR_SUSPF; in HAL_DMAEx_Resume()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_ll_dma.c350 LL_DMA_WriteReg(tmp, CFCR, 0x00003F00U); in LL_DMA_DeInit()
Dstm32h5xx_hal_dma_ex.c3593 hdma->Instance->CFCR |= DMA_CFCR_SUSPF; in HAL_DMAEx_Resume()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_ll_dma.c385 LL_DMA_WriteReg(tmp, CFCR, 0x00003F00U); in LL_DMA_DeInit()
Dstm32h7rsxx_hal_dma_ex.c3577 hdma->Instance->CFCR |= DMA_CFCR_SUSPF; in HAL_DMAEx_Resume()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/src/
Dstm32n6xx_ll_dma.c402 LL_DMA_WriteReg(tmp, CFCR, 0x00003F00U); in LL_DMA_DeInit()
Dstm32n6xx_hal_dma_ex.c3613 hdma->Instance->CFCR |= DMA_CFCR_SUSPF; in HAL_DMAEx_Resume()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h280 …__IO uint32_t CFCR; /*!< DMA channel x flag clear register, Address offset:… member
Dstm32wba52xx.h296 …__IO uint32_t CFCR; /*!< DMA channel x flag clear register, Address offset:… member
Dstm32wba54xx.h313 …__IO uint32_t CFCR; /*!< DMA channel x flag clear register, Address offset:… member
Dstm32wba5mxx.h313 …__IO uint32_t CFCR; /*!< DMA channel x flag clear register, Address offset:… member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h405 …__IO uint32_t CFCR; /*!< DMA channel x flag clear register, Address offset: … member

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