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Searched refs:CCCSR (Results 1 – 25 of 59) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_system.h803 SET_BIT(SBS->CCCSR, SBS_CCCSR_XSPI2_IOHSLV); in LL_SBS_EnableXSPI2SpeedOptim()
813 CLEAR_BIT(SBS->CCCSR, SBS_CCCSR_XSPI2_IOHSLV); in LL_SBS_DisableXSPI2SpeedOptim()
823 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_XSPI2_IOHSLV) != 0UL) ? 1UL : 0UL); in LL_SBS_IsEnabledXSPI2SpeedOptim()
833 SET_BIT(SBS->CCCSR, SBS_CCCSR_XSPI1_IOHSLV); in LL_SBS_EnableXSPI1SpeedOptim()
843 CLEAR_BIT(SBS->CCCSR, SBS_CCCSR_XSPI1_IOHSLV); in LL_SBS_DisableXSPI1SpeedOptim()
853 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_XSPI1_IOHSLV) != 0UL) ? 1UL : 0UL); in LL_SBS_IsEnabledXSPI1SpeedOptim()
863 SET_BIT(SBS->CCCSR, SBS_CCCSR_IOHSLV); in LL_SBS_EnableIOSpeedOptim()
873 CLEAR_BIT(SBS->CCCSR, SBS_CCCSR_IOHSLV); in LL_SBS_DisableIOSpeedOptim()
883 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_IOHSLV) != 0UL) ? 1UL : 0UL); in LL_SBS_IsEnabledIOSpeedOptim()
893 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_XSPI2_COMP_RDY) != 0UL) ? 1UL : 0UL); in LL_SBS_IsReadyXSPI2CompCell()
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_system.h779 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN); in LL_SYSCFG_EnableCompensationCell()
791 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN); in LL_SYSCFG_DisableCompensationCell()
801 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN) == SYSCFG_CCCSR_EN) ? 1UL : 0UL); in LL_SYSCFG_IsEnabledCompensationCell()
811 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_READY) == (SYSCFG_CCCSR_READY)) ? 1UL : 0UL); in LL_SYSCFG_IsActiveFlag_CMPCR()
825 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV); in LL_SYSCFG_EnableIOSpeedOptimization()
827 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV0); in LL_SYSCFG_EnableIOSpeedOptimization()
842 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV1); in LL_SYSCFG_EnableIOSpeedOptimization1()
855 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV2); in LL_SYSCFG_EnableIOSpeedOptimization2()
868 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV3); in LL_SYSCFG_EnableIOSpeedOptimization3()
884 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV); in LL_SYSCFG_DisableIOSpeedOptimization()
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_system.h1226 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1); in LL_SYSCFG_EnableVddCompensationCell()
1238 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2); in LL_SYSCFG_EnableVddIO2CompensationCell()
1249 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN3); in LL_SYSCFG_EnableVddHSPICompensationCell()
1262 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1); in LL_SYSCFG_DisableVddCompensationCell()
1274 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2); in LL_SYSCFG_DisableVddIO2CompensationCell()
1285 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN3); in LL_SYSCFG_DisableVddHSPICompensationCell()
1296 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1) == SYSCFG_CCCSR_EN1) ? 1UL : 0UL); in LL_SYSCFG_IsEnabled_VddCompensationCell()
1306 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2) == SYSCFG_CCCSR_EN2) ? 1UL : 0UL); in LL_SYSCFG_IsEnabled_VddIO2CompensationCell()
1317 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN3) == SYSCFG_CCCSR_EN3) ? 1UL : 0UL); in LL_SYSCFG_IsEnabled_VddHSPICompensationCell()
1328 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_RDY1) == (SYSCFG_CCCSR_RDY1)) ? 1UL : 0UL); in LL_SYSCFG_IsActiveFlag_VddCMPCR()
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/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_ll_system.h698 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1); in LL_SYSCFG_EnableVddCompensationCell()
710 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1); in LL_SYSCFG_DisableVddCompensationCell()
720 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1) == SYSCFG_CCCSR_EN1) ? 1UL : 0UL); in LL_SYSCFG_IsEnabled_VddCompensationCell()
730 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_RDY1) == (SYSCFG_CCCSR_RDY1)) ? 1UL : 0UL); in LL_SYSCFG_IsActiveFlag_VddCMPCR()
744 MODIFY_REG(SYSCFG->CCCSR, SYSCFG_CCCSR_CS1, CompCode); in LL_SYSCFG_SetVddCellCompensationCode()
756 return (uint32_t)(READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_CS1)); in LL_SYSCFG_GetVddCellCompensationCode()
836 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2); in LL_SYSCFG_EnableVddIO2CompensationCell()
848 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2); in LL_SYSCFG_DisableVddIO2CompensationCell()
858 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2) == SYSCFG_CCCSR_EN2) ? 1UL : 0UL); in LL_SYSCFG_IsEnabled_VddIO2CompensationCell()
868 return ((READ_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_RDY2) == (SYSCFG_CCCSR_RDY2)) ? 1UL : 0UL); in LL_SYSCFG_IsActiveFlag_VddIO2CMPCR()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_system.h1165 SET_BIT(SBS->CCCSR, SBS_CCCSR_EN1); in LL_SBS_EnableVddCompensationCell()
1177 SET_BIT(SBS->CCCSR, SBS_CCCSR_EN2); in LL_SBS_EnableVddIOCompensationCell()
1189 CLEAR_BIT(SBS->CCCSR, SBS_CCCSR_EN1); in LL_SBS_DisableVddCompensationCell()
1201 CLEAR_BIT(SBS->CCCSR, SBS_CCCSR_EN2); in LL_SBS_DisableVddIOCompensationCell()
1211 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_EN1) == SBS_CCCSR_EN1) ? 1UL : 0UL); in LL_SBS_IsEnabled_VddCompensationCell()
1221 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_EN2) == SBS_CCCSR_EN2) ? 1UL : 0UL); in LL_SBS_IsEnabled_VddIOCompensationCell()
1231 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_RDY1) == (SBS_CCCSR_RDY1)) ? 1UL : 0UL); in LL_SBS_IsActiveFlag_VddCMPCR()
1241 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_RDY2) == (SBS_CCCSR_RDY2)) ? 1UL : 0UL); in LL_SBS_IsActiveFlag_VddIOCMPCR()
1256 SET_BIT(SBS->CCCSR, CompCode); in LL_SBS_SetVddCellCompensationCode()
1270 SET_BIT(SBS->CCCSR, CompCode); in LL_SBS_SetVddIOCellCompensationCode()
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/src/
Dstm32h5xx_hal.c726 SET_BIT(SBS->CCCSR, SBS_CCCSR_EN1) ; in HAL_SBS_EnableVddIO1CompensationCell()
737 CLEAR_BIT(SBS->CCCSR, SBS_CCCSR_EN1); in HAL_SBS_DisableVddIO1CompensationCell()
748 SET_BIT(SBS->CCCSR, SBS_CCCSR_EN2) ; in HAL_SBS_EnableVddIO2CompensationCell()
759 CLEAR_BIT(SBS->CCCSR, SBS_CCCSR_EN2); in HAL_SBS_DisableVddIO2CompensationCell()
774 MODIFY_REG(SBS->CCCSR, SBS_CCCSR_CS1, (uint32_t)(SBS_CompCode)); in HAL_SBS_VDDCompensationCodeSelect()
789 MODIFY_REG(SBS->CCCSR, SBS_CCCSR_CS2, (uint32_t)(SBS_CompCode)); in HAL_SBS_VDDIOCompensationCodeSelect()
798 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_RDY1) == SBS_CCCSR_RDY1) ? 1UL : 0UL); in HAL_SBS_GetVddIO1CompensationCellReadyFlag()
807 return ((READ_BIT(SBS->CCCSR, SBS_CCCSR_RDY2) == SBS_CCCSR_RDY2) ? 1UL : 0UL); in HAL_SBS_GetVddIO2CompensationCellReadyFlag()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/src/
Dstm32u5xx_hal.c767 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1); in HAL_SYSCFG_EnableVddCompensationCell()
779 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2); in HAL_SYSCFG_EnableVddIO2CompensationCell()
790 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN3); in HAL_SYSCFG_EnableVddHSPICompensationCell()
803 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN1); in HAL_SYSCFG_DisableVddCompensationCell()
815 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN2); in HAL_SYSCFG_DisableVddIO2CompensationCell()
826 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN3); in HAL_SYSCFG_DisableVddHSPICompensationCell()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/src/
Dstm32h7rsxx_hal.c828 SET_BIT(SBS->CCCSR, Selection); in HAL_SBS_EnableCompensationCell()
845 MODIFY_REG(SBS->CCCSR, Selection, 0U); in HAL_SBS_DisableCompensationCell()
862 return (((SBS->CCCSR & Selection) == 0U) ? 0UL : 1UL); in HAL_SBS_GetCompensationCellReadyStatus()
901 MODIFY_REG(SBS->CCCSR, (Selection << 1U), (Code << (POSITION_VAL(Selection) + 1U))); in HAL_SBS_ConfigCompensationCell()
929 *pCode = ((SBS->CCCSR & (Selection << 1U)) == 0U) ? SBS_IO_CELL_CODE : SBS_IO_REGISTER_CODE; in HAL_SBS_GetCompensationCell()
956 SET_BIT(SBS->CCCSR, Selection); in HAL_SBS_EnableIOSpeedOptimize()
973 MODIFY_REG(SBS->CCCSR, Selection, 0U); in HAL_SBS_DisableIOSpeedOptimize()
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/src/
Dstm32h7xx_hal.c778 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN) ; in HAL_EnableCompensationCell()
789 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_EN); in HAL_DisableCompensationCell()
803 SET_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV); in HAL_SYSCFG_EnableIOSpeedOptimize()
805 …SET_BIT(SYSCFG->CCCSR, (SYSCFG_CCCSR_HSLV0| SYSCFG_CCCSR_HSLV1 | SYSCFG_CCCSR_HSLV2 | SYSCFG_CCCS… in HAL_SYSCFG_EnableIOSpeedOptimize()
819 CLEAR_BIT(SYSCFG->CCCSR, SYSCFG_CCCSR_HSLV); in HAL_SYSCFG_DisableIOSpeedOptimize()
821 …CLEAR_BIT(SYSCFG->CCCSR, (SYSCFG_CCCSR_HSLV0| SYSCFG_CCCSR_HSLV1 | SYSCFG_CCCSR_HSLV2 | SYSCFG_CC… in HAL_SYSCFG_DisableIOSpeedOptimize()
837 MODIFY_REG(SYSCFG->CCCSR, SYSCFG_CCCSR_CS, (uint32_t)(SYSCFG_CompCode)); in HAL_SYSCFG_CompensationCodeSelect()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/src/
Dstm32wbaxx_hal.c719 SET_BIT(SYSCFG->CCCSR, Selection); in HAL_SYSCFG_EnableCompensationCell()
735 MODIFY_REG(SYSCFG->CCCSR, Selection, 0U); in HAL_SYSCFG_DisableCompensationCell()
751 return (((SYSCFG->CCCSR & Selection) == 0U) ? 0UL : 1UL); in HAL_SYSCFG_GetCompensationCellReadyStatus()
789 MODIFY_REG(SYSCFG->CCCSR, (Selection << 1U), (Code << (POSITION_VAL(Selection) + 1U))); in HAL_SYSCFG_ConfigCompensationCell()
816 …*pCode = ((SYSCFG->CCCSR & (Selection << 1U)) == 0U) ? SYSCFG_IO_CELL_CODE : SYSCFG_IO_REGISTER_CO… in HAL_SYSCFG_GetCompensationCell()
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h703 …__IO uint32_t CCCSR; /*!< SYSCFG Conpensaion Cell Control&Status register, Address offset… member
Dstm32wba52xx.h797 …__IO uint32_t CCCSR; /*!< SYSCFG Conpensaion Cell Control&Status register, Address offset… member
Dstm32wba54xx.h859 …__IO uint32_t CCCSR; /*!< SYSCFG Conpensaion Cell Control&Status register, Address offset… member
Dstm32wba5mxx.h859 …__IO uint32_t CCCSR; /*!< SYSCFG Conpensaion Cell Control&Status register, Address offset… member
Dstm32wba55xx.h859 …__IO uint32_t CCCSR; /*!< SYSCFG Conpensaion Cell Control&Status register, Address offset… member
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h909 …__IO uint32_t CCCSR; /*!< SBS Compensation Cell Control & Status Register, Address offset… member
Dstm32h523xx.h1089 …__IO uint32_t CCCSR; /*!< SBS Compensation Cell Control & Status Register, Address offset… member
Dstm32h562xx.h1158 …__IO uint32_t CCCSR; /*!< SBS Compensation Cell Control & Status Register, Address offset… member
/hal_stm32-latest/stm32cube/stm32h7xx/soc/
Dstm32h7a3xx.h928 …__IO uint32_t CCCSR; /*!< SYSCFG compensation cell control/status register, Address off… member
Dstm32h7b0xx.h931 …__IO uint32_t CCCSR; /*!< SYSCFG compensation cell control/status register, Address off… member
Dstm32h7b0xxq.h932 …__IO uint32_t CCCSR; /*!< SYSCFG compensation cell control/status register, Address off… member
Dstm32h7a3xxq.h929 …__IO uint32_t CCCSR; /*!< SYSCFG compensation cell control/status register, Address off… member
/hal_stm32-latest/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h1179 …__IO uint32_t CCCSR; /*!< SYSCFG Conpensaion Cell Control&Status register, Address offset… member
Dstm32u535xx.h1101 …__IO uint32_t CCCSR; /*!< SYSCFG Conpensaion Cell Control&Status register, Address offset… member
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h1585 …__IO uint32_t CCCSR; /*!< SBS IO Compensation Cell Control and Status register, Address of… member

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