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Searched refs:APB1ENR1 (Results 1 – 25 of 95) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h819 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
821 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
827 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
829 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
835 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
837 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
844 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
846 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
853 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
855 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
[all …]
Dstm32g4xx_ll_bus.h916 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
918 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
997 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1071 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h939 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
941 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
947 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
949 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
955 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
957 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
963 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
965 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
971 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
973 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
[all …]
Dstm32l5xx_ll_bus.h888 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
890 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
974 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1053 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h1067 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1069 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1076 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
1078 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
1086 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1088 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1096 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
1098 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
1105 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
1107 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
[all …]
Dstm32l4xx_ll_bus.h1090 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1092 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1181 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1265 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_hal_rcc.h1343 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN);\
1345 tmpreg = READ_REG(RCC->APB1ENR1);\
1351 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN);\
1353 tmpreg = READ_REG(RCC->APB1ENR1);\
1359 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN);\
1361 tmpreg = READ_REG(RCC->APB1ENR1);\
1367 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN);\
1369 tmpreg = READ_REG(RCC->APB1ENR1);\
1375 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN);\
1377 tmpreg = READ_REG(RCC->APB1ENR1);\
[all …]
Dstm32h7rsxx_ll_bus.h1418 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1420 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1481 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1U : 0U); in LL_APB1_GRP1_IsEnabledClock()
1539 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1458 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1460 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
1466 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
1468 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
1474 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1476 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM4EN); \
1482 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
1484 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM5EN); \
1490 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
1492 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM6EN); \
[all …]
Dstm32u5xx_ll_bus.h1871 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1873 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1946 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
2025 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h839 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
841 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM2EN); \
848 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
850 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_TIM3EN); \
859 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
861 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_WWDGEN); \
870 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \
872 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_USART2EN); \
881 SET_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \
883 … tmpreg = READ_BIT(RCC->APB1ENR1, RCC_APB1ENR1_I2C1EN); \
[all …]
Dstm32wbaxx_ll_bus.h1023 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1025 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
1070 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1108 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_bus.h942 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
944 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
995 return ((READ_BIT(RCC->APB1ENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1040 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_bus.h917 SET_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
919 tmpreg = READ_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_EnableClock()
973 return ((READ_BIT(RCC->APB1ENR1, Periphs) == (Periphs)) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
1020 CLEAR_BIT(RCC->APB1ENR1, Periphs); in LL_APB1_GRP1_DisableClock()
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_bus.h2278 tmpreg = READ_REG(RCC->APB1ENR1); in LL_APB1_GRP1_EnableClock()
2343 return ((READ_BIT(RCC->APB1ENR1, Periphs) == Periphs) ? 1UL : 0UL); in LL_APB1_GRP1_IsEnabledClock()
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/src/
Dstm32l5xx_hal_rcc.c387 if (HAL_IS_BIT_CLR(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)) in HAL_RCC_DeInit()
767 if (HAL_IS_BIT_CLR(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/src/
Dstm32l4xx_hal_rcc.c740 if(HAL_IS_BIT_CLR(RCC->APB1ENR1, RCC_APB1ENR1_PWREN)) in HAL_RCC_OscConfig()
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h543 …__IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, … member
Dstm32wle5xx.h543 …__IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, … member
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h582 …__IO uint32_t APB1ENR1; /*!< APB1 Peripherals Clock Enable Low Register Address … member
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h415 …__IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, … member
Dstm32wb1mxx.h410 …__IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, … member
Dstm32wb30xx.h414 …__IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, … member
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h400 …__IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, … member
Dstm32wb15xx.h410 …__IO uint32_t APB1ENR1; /*!< RCC APB1 peripheral clocks enable register 1, … member

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