ADC_REG_TRIG_EXT_EDGE_DEFAULT (reference) in projects: hal_stm32-latest

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Searched refs:ADC_REG_TRIG_EXT_EDGE_DEFAULT (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/
D	stm32f3xx_ll_adc.h	123 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (… macro 137 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \ 138 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \ 139 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) ) 831 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1_ADC12 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 832 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2_ADC12 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 833 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 834 …XT_TIM2_CH2_ADC12 (ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 835 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO_ADC12 (ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 836 …XT_TIM4_CH4_ADC12 (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/
D	stm32g4xx_ll_adc.h	116 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (d… macro 132 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 133 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 134 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 995 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 999 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 1002 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 1008 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 1014 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 1019 … ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
D	stm32n6xx_ll_adc.h	113 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (def… macro 129 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 130 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 131 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 1023 #define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 1026 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 1030 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 1035 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 1039 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 1043 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/
D	stm32f2xx_ll_adc.h	110 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CR2_EXTEN_0) /* Trigger edge set to rising edge (d… macro 124 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 1U)) \| \ 125 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 2U)) \| \ 126 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 3U))) 633 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 634 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 635 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CR2_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 636 …RIG_EXT_TIM2_CH2 (ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 637 #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CR2_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 638 …RIG_EXT_TIM2_CH4 (ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_adc.h	171 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (def… macro 192 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 193 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 194 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 1214 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 1215 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 1216 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 1217 …IG_EXT_TIM2_CH2 (ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 1218 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 1219 …IG_EXT_TIM4_CH4 (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/
D	stm32f7xx_ll_adc.h	110 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CR2_EXTEN_0) /* Trigger edge set to rising edge (d… macro 124 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 1U)) \| \ 125 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 2U)) \| \ 126 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 3U))) 644 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 ((uint32_t)ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 645 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 646 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CR2_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 647 …RIG_EXT_TIM2_CH2 (ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 648 #define LL_ADC_REG_TRIG_EXT_TIM5_TRGO (ADC_CR2_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 649 …RIG_EXT_TIM4_CH4 (ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32f4xx/drivers/include/
D	stm32f4xx_ll_adc.h	110 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CR2_EXTEN_0) /* Trigger edge set to rising edge (d… macro 124 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4UL * 1UL)) \| \ 125 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4UL * 2UL)) \| \ 126 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4UL * 3UL))) 656 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 657 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 658 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CR2_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 659 …RIG_EXT_TIM2_CH2 (ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 660 #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CR2_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 661 …RIG_EXT_TIM2_CH4 (ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_ll_adc.h	112 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (d… macro 128 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 129 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 130 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 976 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 980 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 984 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 989 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 993 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 997 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/
D	stm32mp1xx_ll_adc.h	131 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (… macro 145 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 146 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 147 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 867 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 868 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 869 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 870 …IG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 871 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 872 …IG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
D	stm32h7rsxx_ll_adc.h	116 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (d… macro 132 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 133 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 134 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 977 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 981 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 985 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 990 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 994 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 998 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/
D	stm32h7xx_ll_adc.h	129 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (… macro 143 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 144 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 145 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 980 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 981 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 982 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 983 …IG_EXT_TIM2_CH2 (ADC_CFGR_EXTSEL_1 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 984 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 985 …IG_EXT_TIM4_CH4 (ADC_CFGR_EXTSEL_2 \| ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/
D	stm32l1xx_ll_adc.h	136 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CR2_EXTEN_0) /* Trigger edge set to rising edge (d… macro 150 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 1U)) \| \ 151 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 2U)) \| \ 152 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) >> (4U * 3U))) 758 …RIG_EXT_TIM2_TRGO (ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 759 #define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CR2_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 760 #define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CR2_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 761 …RIG_EXT_TIM2_CH2 (ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 762 … (ADC_CR2_EXTSEL_2 \| ADC_CR2_EXTSEL_1 \| ADC_CR2_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 763 #define LL_ADC_REG_TRIG_EXT_TIM3_CH3 (ADC_CR2_EXTSEL_3 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/
D	stm32l4xx_ll_adc.h	116 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (d… macro 132 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 133 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 134 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 979 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 983 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 986 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 990 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 994 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 999 … ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/
D	stm32l5xx_ll_adc.h	116 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (d… macro 132 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 133 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 134 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 950 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 954 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 957 #define LL_ADC_REG_TRIG_EXT_TIM1_CH1 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 961 #define LL_ADC_REG_TRIG_EXT_TIM1_CH2 (ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 965 #define LL_ADC_REG_TRIG_EXT_TIM1_CH3 (ADC_CFGR_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 970 … ADC_CFGR_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
D	stm32l0xx_ll_adc.h	52 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge … macro 66 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \ 67 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \ 68 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) ) 536 #define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 537 #define LL_ADC_REG_TRIG_EXT_TIM21_CH2 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 538 #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 539 …EXT_TIM2_CH4 (ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 540 #define LL_ADC_REG_TRIG_EXT_TIM22_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 541 …EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32g0xx/drivers/include/
D	stm32g0xx_ll_adc.h	71 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (… macro 87 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 88 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 89 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 760 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 763 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 769 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 774 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 779 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 785 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
D	stm32f0xx_ll_adc.h	52 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge … macro 66 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \ 67 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \ 68 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) ) 462 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 463 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 464 #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 465 …EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< … 466 #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) …
/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/
D	stm32wbxx_ll_adc.h	129 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR_EXTEN_0) /* Trigger edge set to rising edge (… macro 143 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 144 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 145 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 938 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 939 … ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 940 … ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 941 … ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 942 …DC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … 943 …DC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) … [all …]
/hal_stm32-latest/stm32cube/stm32u0xx/drivers/include/
D	stm32u0xx_ll_adc.h	70 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (… macro 86 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 87 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 88 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 753 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 756 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 760 #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 764 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 767 #define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 771 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular [all …]
/hal_stm32-latest/stm32cube/stm32wlxx/drivers/include/
D	stm32wlxx_ll_adc.h	71 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge … macro 87 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 88 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 89 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 650 … ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< … 651 … ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< … 652 … ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< … 653 … ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< … 654 …DC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< … 655 …DC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< …
/hal_stm32-latest/stm32cube/stm32wbaxx/drivers/include/
D	stm32wbaxx_ll_adc.h	70 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (… macro 86 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 87 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 88 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 720 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 723 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 727 #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /… 731 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular 736 … \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular
/hal_stm32-latest/stm32cube/stm32c0xx/drivers/include/
D	stm32c0xx_ll_adc.h	70 #define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (… macro 86 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1UL)) \| \ 87 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2UL)) \| \ 88 … ((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3UL)) ) 777 #define LL_ADC_REG_TRIG_EXT_TIM1_TRGO2 (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular con… 780 #define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< … 785 #define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< … 790 … \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger 794 … \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /*!< ADC group regular

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