/hal_stm32-latest/stm32cube/stm32f3xx/drivers/include/ |
D | stm32f3xx_ll_adc.h | 108 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4275 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4276 …NEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 4346 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 4347 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 4716 …MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK))) | in LL_ADC_INJ_ConfigQueueContext() 4717 …MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK))) | in LL_ADC_INJ_ConfigQueueContext() 4718 …MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK))) | in LL_ADC_INJ_ConfigQueueContext() 4719 …MASK) >> (ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS - (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK))) | in LL_ADC_INJ_ConfigQueueContext() 7355 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro [all …]
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/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_ll_adc.h | 98 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4985 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4987 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 5054 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 5055 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 5389 << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5391 << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5393 << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5395 << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32h5xx_hal_adc_ex.h | 596 << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32mp1xx/drivers/include/ |
D | stm32mp1xx_ll_adc.h | 115 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4014 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4015 …NEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 4082 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 4083 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 4417 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 4418 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 4419 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 4420 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32mp1xx_hal_adc_ex.h | 442 …NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/ |
D | stm32h7rsxx_ll_adc.h | 100 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4949 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4951 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 5015 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 5016 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 5335 << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5337 << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5339 << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5341 << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32h7rsxx_hal_adc_ex.h | 583 << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_ll_adc.h | 100 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4907 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4909 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 4985 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 4986 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 5346 << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5348 << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5350 << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5352 << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32l4xx_hal_adc_ex.h | 618 << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_ll_adc.h | 100 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4657 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4659 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 4727 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 4728 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 5056 << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5058 << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5060 << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5062 << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32l5xx_hal_adc_ex.h | 588 << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_ll_adc.h | 113 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4898 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4899 …NEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 4961 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 4962 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 5263 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5264 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5265 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5266 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32wbxx_hal_adc_ex.h | 344 …NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_ll_adc.h | 100 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 5694 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 5696 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 5778 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 5779 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 6194 << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 6196 << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 6198 << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 6200 << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32g4xx_hal_adc_ex.h | 646 << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_ll_adc.h | 128 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 5908 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 5910 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 5946 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 5947 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 6228 << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 6230 << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 6232 << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 6234 << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32u5xx_hal_adc_ex.h | 577 & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_ll_adc.h | 113 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 4900 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4901 …NEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 4968 …ANNEL_ID_NUMBER_MASK >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 4969 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS in LL_ADC_INJ_GetSequencerRanks() 5305 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_4 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5306 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_3 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5307 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_2 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext() 5308 …MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << (LL_ADC_INJ_RANK_1 & ADC_INJ_RANK_ID_JSQR_MASK)) | in LL_ADC_INJ_ConfigQueueContext()
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D | stm32h7xx_hal_adc_ex.h | 514 …NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32l1xx/drivers/include/ |
D | stm32l1xx_ll_adc.h | 121 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro 3593 ADC_CHANNEL_ID_NUMBER_MASK << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 3594 (Channel & ADC_CHANNEL_ID_NUMBER_MASK) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 3675 ADC_CHANNEL_ID_NUMBER_MASK << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 3676 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK) in LL_ADC_INJ_GetSequencerRanks()
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/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/ |
D | stm32n6xx_ll_adc.h | 99 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_NUMBER_MASK_POSBIT0) macro 4769 << (Rank & ADC_INJ_RANK_ID_JSQR_MASK), in LL_ADC_INJ_SetSequencerRanks() 4770 (Channel & ADC_CHANNEL_NUMBER_MASK) << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)); in LL_ADC_INJ_SetSequencerRanks() 4833 ADC_CHANNEL_NUMBER_MASK << (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks() 4834 >> (Rank & ADC_INJ_RANK_ID_JSQR_MASK)) in LL_ADC_INJ_GetSequencerRanks()
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D | stm32n6xx_hal_adc_ex.h | 696 << ((__RANKNB__) & ADC_INJ_RANK_ID_JSQR_MASK))
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/hal_stm32-latest/stm32cube/stm32f1xx/drivers/include/ |
D | stm32f1xx_ll_adc.h | 104 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro
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/hal_stm32-latest/stm32cube/stm32f2xx/drivers/include/ |
D | stm32f2xx_ll_adc.h | 104 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro
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/hal_stm32-latest/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_ll_adc.h | 104 #define ADC_INJ_RANK_ID_JSQR_MASK (ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0) macro
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