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Searched refs:ADC_CFGR1_AWDCH_2 (Results 1 – 25 of 38) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_adc.h453 #define ADC_CHANNEL_4 ((uint32_t)(ADC_CHSELR_CHSEL4)| ADC_CFGR1_AWDCH_2)
454 #define ADC_CHANNEL_5 ((uint32_t)(ADC_CHSELR_CHSEL5)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_…
455 #define ADC_CHANNEL_6 ((uint32_t)(ADC_CHSELR_CHSEL6)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_…
456 #define ADC_CHANNEL_7 ((uint32_t)(ADC_CHSELR_CHSEL7)| ADC_CFGR1_AWDCH_2| ADC_CFGR1_AWDCH_…
461 …fine ADC_CHANNEL_12 ((uint32_t)(ADC_CHSELR_CHSEL12)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2)
462 …NEL_13 ((uint32_t)(ADC_CHSELR_CHSEL13)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_A…
463 …NEL_14 ((uint32_t)(ADC_CHSELR_CHSEL14)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_A…
464 …NEL_15 ((uint32_t)(ADC_CHSELR_CHSEL15)| ADC_CFGR1_AWDCH_3| ADC_CFGR1_AWDCH_2| ADC_CFGR1_A…
Dstm32l0xx_ll_adc.h99 …NEL_4_NUMBER ( ADC_CFGR1_AWDCH_2 …
100 …NEL_5_NUMBER ( ADC_CFGR1_AWDCH_2 …
101 …NEL_6_NUMBER ( ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
102 …NEL_7_NUMBER ( ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
107 …NEL_12_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 …
108 …NEL_13_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 …
109 …NEL_14_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
110 …NEL_15_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
/hal_stm32-latest/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_ll_adc.h99 …NEL_4_NUMBER ( ADC_CFGR1_AWDCH_2 …
100 …NEL_5_NUMBER ( ADC_CFGR1_AWDCH_2 …
101 …NEL_6_NUMBER ( ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
102 …NEL_7_NUMBER ( ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
107 …NEL_12_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 …
108 …NEL_13_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 …
109 …NEL_14_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
110 …NEL_15_NUMBER ( ADC_CFGR1_AWDCH_3 | ADC_CFGR1_AWDCH_2 | ADC_CFGR1_…
/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h692 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f030x8.h708 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f070x6.h737 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f031x6.h702 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f030xc.h724 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f038xx.h701 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f070xb.h760 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f058xx.h807 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
Dstm32f051x8.h808 #define ADC_CFGR1_AWDCH_2 (ADC_CFGR1_AWD1CH_2) macro
/hal_stm32-latest/stm32cube/stm32l0xx/soc/
Dstm32l041xx.h717 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l010x8.h675 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l010xb.h680 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l011xx.h687 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l021xx.h708 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l031xx.h696 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l051xx.h731 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l010x4.h667 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l010x6.h673 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l081xx.h774 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l071xx.h753 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l052xx.h840 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro
Dstm32l062xx.h861 #define ADC_CFGR1_AWDCH_2 (0x04UL << ADC_CFGR1_AWDCH_Pos) /*!< 0x10000000 */ macro

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